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Why does a steeper load line gives higher current gain, while a flatter line gives higher voltage gain? I read multiple tutorials where they only provide a graph without explanation and I can't visualize why it is.

For the upper load line, if a small or input signal fluctuates on a DC-biased base current (e.g. 40uA in the image) at a fixed operating voltage of \$V_{CE}\$, then the output amplified current, or \$I_C\$ fluctuates around 5mA. And for the lower load line, if small signal rides on the 20uA base current, output collector current fluctuates around 3mA with more of less the same amount. In either case, I don't see where \$ \partial I_c \over \partial I_b\$ differs for different load lines. Same question for the voltage gain. http://hyperphysics.phy-astr.gsu.edu/hbase/Electronic/loadline.html

[EDIT]

Is that what it means by saying a steeper line gives higher current gain?

load line sample

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  • \$\begingroup\$ "fixed operating voltage Vce" ? In your circuit, how can you manage to keep Vce constant? \$\endgroup\$
    – LvW
    Commented May 6, 2020 at 11:23
  • \$\begingroup\$ You mean the collector current and Vce fluctuates in pair so when collector current goes up Vce goes down. But still I don't see how it has higher current gain for a steeper slope. \$\endgroup\$
    – KMC
    Commented May 6, 2020 at 12:14

4 Answers 4

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This can be easily seen from graph below: enter image description here

There are two load lines: Green with smaller slope and Red with higher slope.
For a given change in \$V_{be}\$, lower slope (green line) will give a corresponding higher change in \$V_{ce}\$, simply because it has less slope. Hence voltage gain is higher, as it is just the ratio \$\frac{\Delta V_{ce}}{\Delta V_{be}}\$.
By the same reasoning, a line with higher slope (red line) will give more current gain simply because change in the output current \$I_c\$ will be more for higher slope.
This can also be seen analytically as follows: $$A_v = g_m(R_c||r_{out})$$ Here, \$r_{out}\$ is the output impedance of the transistor (along with its degeneration). Since, \$r_{out}\$ is very high, $$A_v \approx g_mR_c$$ Thus, higher \$R_c\$ implies higher voltage gain. $$A_i = \beta \frac{r_{out}}{r_{out}+R_c}$$ Clearly, if \$R_{c}\$ is very small, $$A_i \approx \beta,$$ which is the highest current gain.

In response to LvW's Comment
Assuming, \$R_E\$ is zero, the following is the relation between change in \$V_{be}\$ and \$I_b\$: $$v_b = \frac{(\beta+1)i_b}{g_m} \implies i_b = \frac{g_mv_b}{(\beta+1)}$$ Thus, change in base current is proportional to the change in base emitter voltage. Thus, the current gain can be compared just by the change in collector current since the change in base current is the same for the two lines.

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  • \$\begingroup\$ Comments are not for extended discussion; this conversation has been moved to chat. \$\endgroup\$
    – Voltage Spike
    Commented Jun 10, 2020 at 22:30
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I think, you are using the diagram not in the right manner.

  • Steeper load line: When the base current varies between 30µA and 50µA, the collector current change is between 2.5....and 5mA. This gives a current gain of 2.5E3/20=125. The corresponding Vce change is 14-9=5Volt.

  • Lower load line: For the same Ib variation, we have, of course, the same variation in collector current and hence, the same current gain. However, the Vce variation now is between app. 0.5V and 9V (9-0.5=8.5V).

I think, that`s all you can derive from this graph. So, I do not understand the question which assumes Vce=const.

Comment/update: You are asking "Why does a steeper load line gives higher current gain...."?

More or less by accident, I have found a formula which shows how much the current gain goes down for a smaller slope of the load line (when the sum (Rc+Re) increases.):

ic/ib=hfe/[1+(Rc+Re)/ro] with hfe=beta (short circuit current gain) and ro=d(Vce)/d(Ic)

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  • \$\begingroup\$ Thanks for the confirmation. I now see the voltage gain but still not the current gain. I did somewhat similar by imaginatively drawing two curves above and below a characteristic curve of a Ib value. I also see more or less same current gain between the two slope. Hence my question, since it was mentioned/discussed by two credible sources (HyperPhysics and Caltech's Hajimiri lecture videos on BJT). My mistake for saying \$V_{ce}\$ that is wrong. \$\endgroup\$
    – KMC
    Commented May 6, 2020 at 16:20
  • \$\begingroup\$ if I remove \$R_C\$ (also \$R_E\$), \$v_{OUT}\$ will get pulled to \$V_{CC}\$ at any emitter current, but output current would still inversely amplifies the input signal at the base. The load line cannot be drawn and there won't be q-point intersection. Does that mean if I'm driving a load with current (not voltage) I could just remove \$R_C\$? \$\endgroup\$
    – KMC
    Commented May 8, 2020 at 3:46
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current gain is controlled by the active device (vacuum tube, bipolar, fet) and NOT by the load line.

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My answer is purely "geometric". In this arrangement, two straight lines (the relatively horizontal transistor output curve and the inclined load IV curve) intersect at some (relatively small) angle. Move the horizontal line so that to keep it parallel to itself (translate) and observe how the operating point moves along the load line... and how its projections on the coordinate axes move. The smaller the angle between lines, the faster the operating point will move.

1. Simple dynamic (or resistor) load. So, this arrangement of two intersecting lines can be thought as of a "geometric amplifier" which "gain" dLout/dLin depends on the angle between the two lines - the smaller the angle, the higher the gain. The angle can vary from 90 deg (zero gain) to almost 0 deg (infinite gain). In such an amplifying stage with simple dynamic load or simply a resistor load, one of the lines (transistor IV curve) moves while the other (load IV curve) is immovable.

Guillotine_1

Fig. 1. The common-emitter transistor stage with simple dynamic load can be presented graphically by two intersecting lines - the moving output transistor IV curve and the immovable load IV curve

In the graphoanalytical representation (OPs picture), since the transistor IV curve (output characteristic) stays horizontal during its movement (as shown in the picture), the current variations will be the same regardless of the load line slope. So the current gain will not depend on this slope. In reality, the transistor output characteristic is non-ideal - it has some slope (and even varies) because of the Early effect. So the current gain will vary. However, the magnitude of voltage variations, accordingly the voltage gain, significantly depend on the line slope.

2. True dynamic load. In more sophisticated amplifying stages with "true dynamic load", both lines move vertically against each other. The intersection (operating point) vigorously moves horizontally in almost perpendicular direction and the gain (both geometric and electric) is extremely high.

Guillotine_2

Fig. 2. The common-emitter transistor stage with true dynamic load (e.g., the CFA output stage below) can be presented graphically by two moving intersecting lines - oppositely moving transistor output IV curves

Analogy. This geometric phenomenon is used to build moiré patterns. They are a set of many such pairs of intersecting lines. Wikipedia says: "A moiré pattern, formed by two sets of parallel lines, one set inclined at an angle of 5° to the other."

Moiré_pattern

Fig. 3. An example of a Moiré pattern consisting of set of many "geometric amplifiers".

Example: current-feedback amplifier. As a response to the comments about the "geometric amplifier", I have shown below how the operation of the dynamic-load output stage of a current-fedback amplifier (CFA) can be visualized in this way.

Structure. The output stage of CFA consists of two "fighting" transistors (Q4 and Q6) which collectors are joined - Fig. 4. As a result, each of them acts as a dynamic load to the other one and seeks to impose its current value.

CFA - conceptual picture

Fig. 4. CFA - conceptual picture (Wikipedia page)

Operation. The operation of the CFA output stage is presented graphically in Fig. 5 by two oppositely moving intersecting lines - the IV output curves of the transistors Q4 and Q6. Their intersection (operating) point moves along a horizontal line in a perpendicular direction.

CFA visualized

Fig. 5. CFA output stage visualized

We can intuitively understand and explain this phenomenon if we think in terms of static (instant, chordal) collector-emitter resistances instead of currents flowing through them. This means to think of the two collector-emitter junctions (CE4 and CE6) as of two partial resistances (RCE4 and RCE6) of a potentiometer.

When the input base-emitter voltages (VBE4 and VBE6) change differentially - e.g., the magnitute of VBE4 increases while of VBE6 decreases, RCE4 decreases but simultaneously RCE6 increases like the two partial resistances of the potentiometer when moving the slider to right. But the total resistance RCE4 + RCE6 remains constant so the common current flowing through the network remains constant as well and the output voltage VA vigorously changes.

CFA - potentiometer analogy

Fig. 6. CFA output stage - a potentiometer analogy (when moving the wiper, the voltage changes but the total resistance and accordingly, the current do not change)

In the graphical representation - Fig. 6, RCE4 IV curve rotates clockwise and RCE6 (for some reason, labeled RCE2 here) IV curve simultaneously rotates in the same direction so the operating point A vigorously moves to right along the horizontal blue line. When VBE4 and VBE6 change differentially but in the opposite direction, the processes are reversed.

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  • \$\begingroup\$ I'm not all too sure but I have edited my question with a drawing of what I think you're trying to point out. Is that what you mean? \$\endgroup\$
    – KMC
    Commented May 6, 2020 at 12:59
  • \$\begingroup\$ My geometric explanation was about the simple common-emitter amplifying stage where it is useful. I'm not sure if that's the case here. This is a circuit with negative feedback and I'm not sure if this grapho-analytical representation is so useful here. For example, note that the voltage on X axis is VCE, not VC as usual... as though the emitter is grounded. Better leave it and answer the question, "What do you really want to know?" If it is about the basic idea behind this circuit solution, I will gladly help you... \$\endgroup\$ Commented May 6, 2020 at 13:20
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    \$\begingroup\$ I just started learning electronics and transistor. been reading books and online tutorial on the subject, so I don't have a clear objective in mind other than wanting to understanding what I read or clear the confusion I had. I wanted to know if I'm interpreting the graph correctly, and in particular what it meant by "a steeper load line gives higher current gain". I think along your answers and edit another graph but I have no where to confirm if my understanding is correct. \$\endgroup\$
    – KMC
    Commented May 6, 2020 at 14:00
  • \$\begingroup\$ I must admit that I do not see any relation between the graph (and the question) and the "moire pattern". \$\endgroup\$
    – LvW
    Commented May 6, 2020 at 14:24
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    \$\begingroup\$ No, your understanding of "moire pattern" is incorrect. Your association is meaningless because it is wrong, not because the reader is unimaginative, and such statements are arrogant and egotistical. \$\endgroup\$ Commented May 6, 2020 at 21:12

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