# Output characteristics of transistor

Why is the slope of output characteristics of transistor in CE configuration more than that of CB configuration??

• Slope of what over what? Under which conditions? We'll need a bit of context. May 6, 2020 at 15:01
• I assumed output characteristics meant variation of output current wrt output voltage at constant input voltage. May 6, 2020 at 15:03
• are these graphics assuming the same transistor? May 6, 2020 at 15:11
• ignore the values,just picked them to show the slopes,slope is almost zero in CB configuration while its not the case in CE. May 6, 2020 at 15:19
• im asking from a theoretical perspective, when we compare the output characteristics of two configurations of the same transistor ,the slope remains almost zero in the case of CB config,while we see an increase in output current with increase in Vce in case of CE config. May 6, 2020 at 15:32

The slope of the current vs voltage in the common-emitter configuration is a result of the Early Effect.

As the VCE increases the effective base-emitter junction width decreases. This has a couple of effects.

1. VBE will reduce for a given base current.
2. The amount of recombination occurring within the base region will reduce giving an effective increase in Hfe.

Since in your example, the base current is held constant for each curve the drop in VBE is unimportant, however, the increase in Hfe causes the collector current to increase giving rise to the slope.

In the common-base configuration, the same effects occur, however, the collector current which is the emitter current minus the base current will only see a very minor change in current that is not visible on the graph; for example; if Hfe changes from 100 to 200 as VCE is raised with 10mA driven into the emitter the collector current will only change from ~9.9mA to 9.95mA, an insignificant change.

In the common-emitter configuration with 100uA driven into the base the collector current will change from 10mA to 20mA over the same change in VCE. A much more noticable effect.

The difference needs no transistor physics, it's pure current summing case.

Physically transistors work equally in CE and CB configurations. The slope in the upper curve set shows the dynamic conductance increase between C and E when Ib gets bigger; Ic vs Vce climbs steeper with bigger Ib (see NOTE1)

The same physics happen inside the transistor also in CB configuration, current Ie contains all Ic plus the base current which is say one percent of Ic. When the curves are drawn with separate constant Ie values, the growth of Ic due the growth of Vce is excluded from the drawing by the maker of the drawing.

NOTE1: the increase of Ic when Vce grows is considered harmful in applications where transistor is used as amplifier. It causes loss of gain, because the equivalent dynamic conductance eats a part of the output signal power. Fortunately transistors have been 50 years so good and available with so low cost that this is not a serious obstacle for good designs.