The circuit in the figure below is a circuit for measuring frequencies for RKE systems (a key fob, for example). The frequencies for which this circuit was created, was used to measure frequencies between 100MHz and 500MHz. The values ​​of capacitors and inductors in the schematics are not very accurate because I did not measure these components out of the board yet. However, the doubt I have about this circuit is much more qualitative than quantitative, I still haven't fully understood its functionality.

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As far as I can understand so far, the antenna, which in this case is nothing more than a loop made of very thick conductive wire, feeds a prescaler, the MC12080, which divides the frequency received from the entena by 20. The output of the prescaler passes by an amplification step to be able to feed a binary ripple counter, MC74HC4040A, which in turn loads an 8-Stage Static Shift Register, CD4021BC.This circuit, as described above, has the effect of dividing the original frequency by 20, then by 256, that is, it divides the original RF frequency by 5120.

I imagine that, when the microcontroller sets the input level of transistor Q2 to low for a short period of time, it counts the number of pulses at the output of the shift-register and, this way, calculates the frequency of the signal received by the antenna.

However, I have the following doubts:

1) In the circuit, after the prescaler, there are two branches, and in the lower branch in the schematic, there is a transistor Q2 that I do not know the reason for its existence. There is a capacitor and a resistor in parallel in the collector of this transistor that I don't know what they are for. The colector of the transistor Q2 is connected to the microcontroller, but I don't know why this is made.

2) I intend to use this circuit to perform frequency measurement in the 300MHz-500MHz and 800MHZ-1GHz bands. In fact, I'm interested in frequencies of 315MHz, 433MHz, 868MHz and 915MHz, but I have doubts whether the antenna currently used to measure frequencies between 100MHz and 500MHz will, under higher frequencies, provide enough voltage values ​​for the prescaler. So, I imagined to put a second antenna, which I would choose by switching a relay. What do you think about this ? Can I do this with an antenna as simple as a single conductive loop like the one currently being used?

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    \$\begingroup\$ If you are looking for a gadget to look at these remotes in a practical sense, consider an inexpensive RTL-SDR dongle... not only can you get the frequency, but also examine the signal modulation. Just get the attenuation setting right as if you overload them you may see spurious signals from distortion in the inexpensive receiver itself - ie increase attenuation / reduce gain until you only see one signal. \$\endgroup\$ – Chris Stratton May 6 '20 at 23:07

... it counts the number of pulses at the output of the shift-register

No, it uses the shift register U2 to read out the binary value captured in U1 in serial format. That count, divided by the gate period, gives the frequency at the output of U3.

  1. Q3 (not Q2) is basically being used to detect whether the output of U3 is toggling at all, indicating that there is sufficient signal at its input. C2 and R9 on its input function as a high-pass filter, and C3 and R6 on its collector function as a low-pass filter. If there is a signal, the MCU pin will be pulled low.

  2. 1 mH seems high for the frequency range you're looking at — the series reactance will seriously limit the current available to U3. Is that the real value, or is it just a placeholder?

    In any case, it is probably not necessary to have different coils for different frequencies in the ranges you're looking at, unless the sensitivity is insufficient for your needs. You'll have to experiment to see.

  • \$\begingroup\$ You're right, and I also changed the names of the transistors in the explanation, excuse me. \$\endgroup\$ – Daniel May 7 '20 at 13:44
  • \$\begingroup\$ Let me see if I understand what you said, the count will be performed during the gate period of transistor Q2 and the value of that count will be loaded, in parallel, in the shift register. The gate period of transistor Q2 may be related to the duration of the low level present in the collector of Q3, which is what would indicate the presence of a signal at the output of U3. \$\endgroup\$ – Daniel May 7 '20 at 13:45
  • \$\begingroup\$ After this period, the microcontroller would put high level at the base of Q2, low logic level at pin 9 (parallel / serial control), this last action would cause the input of the decoder became the serial input. So, 8 clock pulses would be sent to the U2's clock and the contents of the recorder could be captured by the microcontroller serially via pin 3 of U2 (Q7). Right ? \$\endgroup\$ – Daniel May 7 '20 at 13:45
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    \$\begingroup\$ "The gate period of transistor Q2 may be related to the duration of the low level present in the collector of Q3". No, they would not be related. Q3 is just a status output to the MCU. The timing on Q2 is entirely controlled by the MCU, and is independent of what is happening with Q3. Really, the Q3 circuit is redundant anyway, since the MCU could just as easily see that there is zero count in U1. \$\endgroup\$ – Dave Tweed May 7 '20 at 23:30
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    \$\begingroup\$ The Q7-D7 connection to the MCU allows it to effectively extend the number of bits in the counter by internally counting edges on this signal. The MC9S08QG8 has only a single internal counter, which is undoubtedly used to create the gate signal, so any other counting must be done in software, triggered by an interrupt. An MCU that had two internal counters wouldn't need U1 or U2 at all -- the output of Q1 could feed the second counter directly. \$\endgroup\$ – Dave Tweed May 8 '20 at 0:37

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