# Implementation of an amplifier in LTSpice

I need to implement the following circuit in LTSpice but I don't know if my schematic is ok. Also, I don't know what values for I should use for Cinf and R2.

The following constraints are imposed:

• VCC= 10V
• VCM = 1.5V
• Vgis a sine wave with a frequency of 1 kHz. Its amplitude will be chosen so as to ensure minimal distortion of the output signal (i.e. v0 should also be a sine wave)
• R1= 15kΩ.

I need to choose a value for R2 and Cinf in order to have a (theoretical)gain value Av=1500.

How can I compute the theoretical expressions of the DC collector currents of bipolar transistors Q1–Q8, considering VBE≈ 0.6V and the theoretical expression of the small-signal voltage gain Av= vo/vg?

The first picture is the schematic and the second is the LTSpice implementation.

What I found is that:

• ICq5=ICq6=ICq7=ICq8=(Vcc - Vbe)/R2
• ICq1=ICq2 = [ICq7 / 2 ] * [Beta/(Beta+1)]
• ICq4=iCq2-current of Q5
• ICq3=ICq1-current of Q3-current of Q4
• Beta in my case is 182.1 because I'm using a BC847A transistor.
• A=Vo/Vg = Gm_q2 * Beta_q5 * R1Gm_q2=ICq2 / Vt that is approx 40*ICq2

How can I find the value of R2? This is what I have now, an sine like wave for Vg • Those terms are all explained in the text below the schematic. What's unclear about them? May 7, 2020 at 19:50
• @BrianDrummond they are explained, but what should I put for Vcc? I can't just let a wire and that's it, I should put something there and idk what to put... May 7, 2020 at 20:33
• Oh. Use a voltage source component. set it to your desired supply voltage like 5V or 12V. Ditto Vcm (use 0.5 * VCC as a starting point; vary it to see what that does to the amplifier later). Vg is an AC source; start with 1 or 10 or 100mV, 1 kHz. And Cinf ... just set it to an impedance RL/10 or less at your lowest test frequency. May 7, 2020 at 20:39
• @BrianDrummond thanks! what values should I put for R2, C∞ in order to a(theoretical)gain value Av= 1500? May 8, 2020 at 6:22
• I've already answered Cinf, and finding R2 is probably part of your exercise. May 8, 2020 at 9:07

Here, my answer is similar to Spehro's with the following differences.

• hFE reduces sharply to 10% if Vce < ~0.5 @ 5mA due to saturation effects.
• Vce(sat) increases with Ic depending on Q (up to 2V at Imax)
• Vcm >=1.5V depends on the load or negative feedback, if used.

• R1 (load) >= than R2 ( current bias)

Proof of concept with 100 uV signal • open-loop gain is large Aol ~ 33k * R1/R2 (with hFE=100)
• 10uV Vcm offset is significant with open loop.

• DC offset due to differences in Vcm and hFE, shown in 2nd simulation depends on hFE.
• also, the load current is DC offset from Vcc/2 due to connection at 0V thus be aware of DC offset voltage or use neg. FB.
• So where it's the theoretical gain=1500?? May 13, 2020 at 10:05

The parameters you mention are all external to the amplifier design.

Your SPICE schematic does not match the design. You need a Vcm voltage source and there should not be a current source connected to Q1 base.

Generally, you might start with Vcm = Vcc/2 and pick Cinf such that Xcinf << RL at the input frequency.

Eg. Vcc = 10, Vcm = 5, Vb= 100mV (AC) or whatever you want to use.

• Please edit this new information into your question, not into the comments. And how are you doing with the calculation? R2 is a bias resistor so it's obviously going to affect the transconductance. May 7, 2020 at 20:30
• I've edited the question. May 8, 2020 at 7:56
• oops edited wrong.... one May 12, 2020 at 13:26
• so...any answer @TonyStewartSunnyskyguyEE75 ? May 13, 2020 at 13:02

I'm more used to thinking with FETS, tho bipolars are my preferred technology.

Takes a while to figure out WHAT IS BEING IGNORED. Clearly the Early Voltage params are not included.

Seems like the diffpair and active_current_mirror load are simply used to dump current into the base of that top PNP amplifier Q5.

Thus the transconductance of the diffpair/active_load is scaled by BETA of Q5, before converted into OUTPUT VOLTAGE across the load resistor.