# Headroom of cathodyne phase inverter (in vacuum tube amplifier)

I know that gain of cathodyne is almost 1, so if it's going to produce 12V peak output, it has to take 12V peak input.
However, if the bias is set to something like (-)1-1.5V, then peak voltage of input signal has to be smaller than 1.5V is we want to avoid distorition, right?
That's how I imagined this situation until I found this somewhere:

Of course, as with a cathode follower, a bias of -2V does not mean that the stage will overdrive if we input more than 2Vpk, the stage has roughly unity-gain remember!

Okay, so there is some magic happening in the background, maybe it has something to do with cathode resistor drop?
I couldn't find anything else on the internet that would help me understand what's happening here.
Could somebody explain this behavior of cathodyne circuit, and show a way to calculate actual peak voltage of input signal before overdrive happens, or provide links to articles where this is explained?

EDIT: -1.5V grid voltage refers to cathode voltage, I'm totally aware that actual grid to ground voltage is positive.
Let's say we need 12V peak signal for power stage. That means output voltage of cathodyne will vary from Vq-12 to Vq+12 (Vq is quiescent voltage).
Let's assume cathode is at 100V in relation to groud. Grid is therefore biased to 98.5V.
If gain is 0.98(let's assume it's 1), then input must also have amplitude of 24V if we want output to have amplitude of 24V.
Actual voltage at grid at time t is Vbias + Vsignal(t).
Minimum Vsignal(t) is -12V, and maximum is +12V, since gain is 1, and we need 24V amplitude in next stage.
So minimum grid voltage is Vbias + min(Vsignal(t))= Vbias - 12V = 86.5, and maximum grid voltage is Vbias + max(Vsignal(t))=Vbias + 12V = 110.5.
Therefore maximum grid voltage is above cathode voltage, so grid to cathode voltage is positive, and saturation occurs.

Of course, since I know this is not what actually happens, there must be a mistake somewhere. Why doesn't grid voltage actually exceed cathode voltage, when peak of signal voltage is greater than difference between grid and cathode?

maybe it has something to do with cathode resistor drop?

It totally has something to do with the cathode resistor drop. The bias setting of -1 volt to -1.5 volt refers to the voltage between grid and cathode and not from grid to 0 volts. A cathodyne has a cathode resistor and, if the anode quiescent current is 1 mA then that cathode resistor also takes that current and raises the cathode to a much higher quiescent voltage (say 40 volts using a 40 kohm cathode resistor). This will mean that the actual bias point for the grid is 38.5 volts to 39 volts and now, with a 24 volt p-p signal on top there is no problem.

if the bias is set to something like (-)1-1.5V, then peak voltage of input signal has to be smaller than 1.5V is we want to avoid distorition, right?

No, you are not accounting for the fact that the cathode voltage, under quiescent conditions might be 30 to 50 volts above 0 volts and this is due to anode current and the presence of the cathode resistor.

## Simulation showing ECC82 waveforms

• Cathode quiescent voltage = 50 volts
• Anode quiescent voltage = 120 volts
• Grid self-biased (like the more recent JFET type bias)

48 volt p-p input signal: -

Grid voltage stays below cathode voltage always.

72 volts p-p input signal: -

Now we see a difference - the ECC82 enters saturation and the grid voltage rises 0.6 volts above the cathode. Anode bottom peak is showing signs of heavy saturation.

• Maybe grid, not gate? Commented May 11, 2020 at 16:17
• @Marla yes, you are right.... fixing...... Commented May 11, 2020 at 16:18
• I know that -1.5V refers to voltage between grid and cathode, this is not what I meant. I'm sorry if question was not clear, I'm not a native speaker. Could you please take a look at my edit?
– J K
Commented May 11, 2020 at 17:24
• OK - you have to choose a tube/valve with the appropriate characteristic and load-line so that saturation is avoided. If saturation is entered a little bit then sure, the grid voltage will go positive with respect to the cathode. Commented May 11, 2020 at 17:34
• Yeah, now I understand, because of large cathode resistor, when grid voltage increases, cathode voltage also increases, so actual variation in voltage difference between grid and cathode is much smaller than variation in grid voltage. Btw, what software did you use for this simulation?
– J K
Commented May 11, 2020 at 18:35