0
\$\begingroup\$

I've been messing with this circuit but I'm struggling to find the solution I'm looking for.

I'm trying to create a sequence of down counters, so that when the first completes the next starts and so on until the last one, then repeat.

I thought it would just be a case of adding a flip-flop between each counter to help with the transition to the next counter. Instead, the first and the third counters start and then when the second switches over it doesn't stop?

multisim example

Also tried using a 4017 divider/counter instead of the flip-flops, as this would give the correct sequence, however, I'm unsure how to connect the CP0 pin, since it would require all the RCO pins connected together. I tried adding a four-input OR gate but that didn't work; not sure if that's an issue with Multisim.

using a decade counter

\$\endgroup\$
1
  • \$\begingroup\$ so that when the first completes the next starts may lack a and the first one stops until the last one completes. What is the goal of the exercise? Switching LS TTL inputs between open and VCC should have no effect. \$\endgroup\$
    – greybeard
    May 13 at 6:30

1 Answer 1

Reset to default
0
\$\begingroup\$

So I've found a solution, however not sure it the best way? It does increase the chip count a little, due to the extra hex inverters needed to match the outputs of the 74ls193's and the 74139's.

enter image description here

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge that you have read and understand our privacy policy and code of conduct.

Not the answer you're looking for? Browse other questions tagged or ask your own question.