# Why any modern CPU masks 5 lower bits in a CL register for shifting operations

I'm digging into left and right shift operations in ASM.

From IA-32 Intel Architecture Software Developer’s Manual 3

All IA-32 processors (starting with the Intel 286 processor) do mask the shift count to 5 bits, resulting in a maximum count of 31. This masking is done in all operating modes (including the virtual-8086 mode) to reduce the maximum execution time of the instructions.

I'm trying to understand the reasoning behind this logic. Maybe it works as it works because on a hardware level it is hard to implement shift for all 32 (or 64) bits in a register using 1 cycle?

Any detailed explanation would help a lot!

• Why would you want to shift all 32 bits? – Andy aka May 12 at 7:37
• @Andyaka the question is not "why I want to do so". The question is "why does it work this way?". It is just seems weird, since the SSE shift instructions (PSLL* etc.) do not mask the shift count. – No Name QA May 12 at 7:44
• Why would anyone want to shift all 32 bits then? – Andy aka May 12 at 7:57
• @Andyaka because it leads us to an inconsistency in shifting behavior. Please, if you know the answer tell me. If not then stop trolling. – No Name QA May 12 at 11:16
• Part of the reason is, C has banned shifting beyond word length so there is no need for other behaviors. Also shifting beyond word length would probably return 0 and can easily be handled as a conditional. – user3528438 May 12 at 14:27

• Thank you! In your last sentence that allows shifting of 16-bit registers via carry you specify 16-bit registers. So in an old good times we could do x << 16 = 0, right? If so, why did they implement x<<32 = x? – No Name QA May 12 at 9:29
• Thank you for clarification. I'm sorry, but I'm not a native english speaker and it is very hard for me to translate your first sentence Because you have 16 bit registers, you must be able to shift 16 bit positions at minimum to be compatible, for example shifting any bit to carry bit. Could you please rewrite it in a more simpler or detailed manner? – No Name QA May 12 at 16:42