Help check amplifier stability

Question

I need to do the stability analysis of my amplifier circuit. I implemented schematic in LTspice, where I did some of simulations, so I would like to keep the same tool also for the stability analysis. The amplifier schematic is the following:

I followed some video tutorial that advices the following steps for stability analysis:

• Break feedback loop for the AC signals by inserting large - 1TH inductor between the output and feedback network (this way we keep the DC bias but block the AC),

• Add large capacitance (1TF) between the feedback network and AC stimulus,

• Ground the input.

Applying the previous, I got the following schematic:

If I correctly understand, the stability check is based by measuring the phase margin of the closed loop gain (that should be V(out)) on the intersect point of 1/β (that should be 1/V(fb), fb is feedback point) and open loop gain plots (that should be V(out)/V(fb)). In general, we should ensure that the phase shift of the feedback signal is less than 180° when amplifier reaches the unity gain (avoid amplification when feedback signal subtraction become addition, because of phase shift). In practice, as a rule of thumb, the minimum phase margin should be 45°. After simulation I get the following plot:

From the plot, I can notice that the phase margin is about 113° (180° - absolute_value(phase at intersection point)), so I can conclude that the amplifier is stable (right?). This also confirms the transient simulation. However, when I remove the 100pF capacitor at the transistor Q4 (the second differential pair), I get phase margin of 145°, but the transient analysis reveals oscillation, like on plot:

I am definitely missing something, so I need help to make correct setup and simulations (probably and interpretation).

Answer 1

Stability depends on the gain and phase of the loop gain. That is the complete loop comparing one side of the break with the other. You should be comparing the gain and phase of the signals either side of the inductor. That is to say comparing Vout to the injected signal.

The complete loop phase must be substantially less than 360 degrees when the loop gain is 1 (unity). Notice that you have 180 degrees lag already at low frequency due to the inverting nature of the combined input stages. So theoretically you're allowed another 180 degrees lag around the rest of the loop at unity gain. In practice a safety margin is included (phase margin of say 45 degrees). So in practice the phase lag around the complete loop should be no more than 315 degrees at unity loop gain.

Also watch out for the phase scale. Where it starts at 180, that would have been clearer if it had been labeled -180 and then increase negatively to -360 where it is marked as 0.

If you find that the loop phase is greater than 315 degrees at unity loop gain then increase the size of C4, the compensation capacitor.