channel length in Cadence

Question

I am using Cadence software to design a CMOS circuit and I am using the GDPK180 library. Can I modify the length of the transistor to be different for the transistors or it should be the same for all?

Answer 1

They can be different.

Usually in logic circuits, the optimal size (for sped and power consumption) is to have all devices at minimum allowable channel length -- the widths may differ.

For analog circuits, different lengths are appropriate for different functions. This cannot be summarized in a single answer, but for example differential pairs of opamps may also be minimum length; devices in current mirrors may be quite long, and cascode devices may be square (identical L & W).