I'm trying to create a filter that filters the output of an inverter at 50kHz PWM (from reading the comments, I'm not sure if I should be calling this the switching freq?) to a sinusoidal one at 50Hz with a THD of less than 2% for the output voltage waveform (output voltage should be at 230Vrms). This circuit is supposed to model an inverted DC-AC output, with a filter attached to this output.

The schematics provided should model the inverter with an output of 50kHz PWM, although from reading the comments, I'm not sure if the voltage source allows this simulation?

enter image description here

I'm experimenting with a simple LCR one stage filter if possible. I understand that a low pass filter requires the shunt capacitor to short the high frequencies, but I'm not sure why the design recommended the use of a series inductor. In the schematics provided, R2 can be viewed as the parasitic resistance of the circuit, and R1 is the load resistor. I'm not sure how to calculate for the L and C values to be used to obtain the specified THD value.

I've tried running through a range of values, but I'm not sure which combination of L and C I should be using. The output waveform (a little messy because of the number of simulations I ran.)

enter image description here

The ideal values for L and C might not be in the range provided. Please advise.

Edit: enter image description here

I've included the inverter circuit so that I can output a PWM waveform. I've modelled the switches to turn ON and OFF to output a triangular wave

  • \$\begingroup\$ You need to specify what the input frequency's voltage and/or current specifications and compliances are. That's missing from what you've written. I also gather you are looking to produce a mains voltage at 50 Hz. We also need your specifications about the 50 Hz output and accuracy details about the input source frequency and output frequency. \$\endgroup\$
    – jonk
    May 17, 2020 at 5:40
  • 1
    \$\begingroup\$ If you're modeling an inverter's output stage filter, then THD should not be your concern, that's up to the control circuitry. The role of the output LC is to filter out some of the high-frequency switching harmonics to whithin designer's specifications, while also taking care of the current ripple. Not THD, only attenuation. What you're testing there is simply a wall plug with an LC filter, that's not how you test an inverter's output. For that you'll need to model the switching bridge. See this for a possible scenario. \$\endgroup\$ May 17, 2020 at 7:14
  • \$\begingroup\$ @ jonk,The input frequency will be the switching frequency at 50kHz. The input voltage isn't specified, but can be adjusted to provide the output voltage at 230Vrms. So it can be increased/decreased accordingly. Not too sure what you mean by accuracy details about the input source freq/output freq? I don't think I've the necessary information for those because the input to this filter stage is supposed to come from an inverted DC-AC waveform \$\endgroup\$
    – cpure
    May 17, 2020 at 12:22
  • \$\begingroup\$ @ a concerned citizen, I think the THD was specified in the design requirement because this filter circuit 'cleans' the output from the inverter and outputs into the grid at 50Hz. Yep, I'm looking to filter the high-freq switching harmonics - just to check, is this different from reducing the voltage THD? I have a separate circuit for the switching bridge, but I'm leaving that aside for now as I'm looking to test each subsystem separately before combining them (although I do foresee issues with my switching bridge as well) \$\endgroup\$
    – cpure
    May 17, 2020 at 12:27
  • \$\begingroup\$ Can we get some clarification in the question please (ie edit the question). The question reads as if you are wanting to use a 50kHz squarewave and filter this to produce 50Hz. This is impossible (where is the 50Hz component in this signal). YET aspects of the comments read that this is mean to be an output filter of an inverter running at 50kHz PWM to synthesis a 50Hz waveform. If this is the case the design of an output RLC sinefilter is well understood but you need to be clear what you have, what you are doing and especially what you want \$\endgroup\$
    – user16222
    May 17, 2020 at 15:33

3 Answers 3


Modelling a low-pass filter on LTSpice to filter an input square wave at 50kHz to obtain a sinusoidal output at 50Hz

There are three parts to such a problem statement

  1. Model the inverter
  2. Design the filter
  3. Model the system

Model the inverter

In the OP a simple 50kHz pulse was used into an RLC "filter". This however isn't how an inverter would work to generate a fundamental of 50Hz (with a PWM of 50kHz).

What is needed is a 50Hz sinus waveform is modulated via a 50kHz carrier.

enter image description here

There are a number of way to perform this. The classic method is via generating the desired 50Hz waveform and using a comparator, compare this with a 50kHz triangular carrier to generate the desired modulation pattern in real time.

Another option is to pre-calculate the PWM patterns and store in a lookup table. Such a solution is very convenient for fixed-frequency, cheap inverters

enter image description here

With the PWM generation created, the inverter and a simple resistive load can be shown. A resistive load is prefered in such examples because an inductive load will smooth out the currents

enter image description here

nice switched voltage and current, but you can see an underlying harmonic. NOTE: an inductive load would have smoothed the currents but the voltage would still look chopped

Design the filter There are a number of methods associated with this. Typically they work by setting the resonant frequency of the filter at the logarithmic halfway be the fundamental and the switching. In this instance, around 1.5kHz

How you balance the L-C is based upon your design criteria. Working through one such method

L = 672uH

C = 16uF

targeting 15kW (10R per phase)

Model the system

With the pwm inverter model running and aspects of the output filter designed. They can be connected to confirm functionality

enter image description here


To generate suitable pwm patterns, two voltage sources (pulse and sine) to create teh triangle carrier and the modulated signal are needed. A schmitt comparator can be used to generate the PWM signals to then feed to the inverter

enter image description here

  • \$\begingroup\$ Thanks, that cleared a lot. I've remodelled an inverter with the suggested filter (i'll change this after to fit my load specification), but I'm not sure if my PWM is working, the waveform this schematic outputs doesn't look right. I've tried for a triangular carrier at 50kHz, but I dont have a 50Hz sinusoidal to superimpose on it, as my source is supposed to be a DC source. I'll edit my question to post my schematics \$\endgroup\$
    – cpure
    May 18, 2020 at 6:43
  • \$\begingroup\$ You are sending the triangle wave to the inverters. You need to generate the PWM 1st \$\endgroup\$
    – user16222
    May 18, 2020 at 10:35

As written : "a square wave at switching frequency of 50kHz" cannot be converted via any filter to another frequency.

what you are probably really asking is how to convert a PWM waveform, with a 50kHz frequency, and mark space ratio modulated at 50Hz, into a 50Hz sinewave.

Now there will be two contributions to THD in the output waveform:

  1. Errors in the modulation imposed on the mark space ratio
  2. Harmonic content arising from the 50kHz PWM ratio ( the thousandth harmonic of the fundamental, and its multiples).

I don't know how you want to apportion your error budget between these two, so I'm going to arbitrarily choose 1% harmonic content for the latter.

So you have an outline specification for a low pass filter, comprising:

  1. Minimum (ideally zero) attenuation at the 50Hz fundamental frequency
  2. Better than 40dB attenuation across your stopband starting at 50 kHz.

So pick a cutoff frequency much higher than 50 Hz, but sufficiently lower than 50 kHz that you can easily achieve 40 dB stopband attenuation. You are allowed an L/C filter (treating the load as a termination resistor) so a second order filter giving 40dB/decade attenuation, therefore the cutoff frequency must be below (ideally well below) 5 khz.

Note that the filter must meet your goals across the range of possible load impedances (RL in your schematic) defined by the output power you require.

This is a simple filter design following well established practice, so have at it.

You can probably substantially improve that 1% figure while maintaining low loss in the filter's parasitic components.

  • \$\begingroup\$ Thank you. May I know what is the purpose of the inductor in this case? Does it help in filtering or does it serve some other purpose. Also, when I tried using the potential divider method to solve for L and C, i.e. (R1//ZC)/(R2+ZL+(R1//Zc)) = 2/100 (as THD is limited to 2%), it gives me the ratio between L and C. I was wondering if there's another equation I can use to solve for L and C individually, or will it remain as a ratio? \$\endgroup\$
    – cpure
    May 17, 2020 at 16:34
  • \$\begingroup\$ As per answer, this is standard passive (L-C) filter design stuff. The inductor is part of the filter. \$\endgroup\$
    – user16324
    May 17, 2020 at 16:48

What you're asking for can't be done.

A linear filter like the one you drew with a sinusoidal input always gives an output at the same frequency as the input. It can attenuate the signal differently depending on the frequency, but it does not change the frequency.

To produce a 50 Hz output from a 50 kHz reference, you need a frequency divider or a phase-locked loop circuit, which are substantially more complicated than your RLC filter, and also require active elements of some kind.


In comments you wrote,

from my understanding, a square wave is made up of many sinusoidal harmonics - attenuating the higher order harmonics will not result in a sinusoidal 50Hz waveform?

The harmonics of a square wave are at odd multiples of the fundamental. So a 50 kHz square wave has harmonics at 150 kHz, 250 kHz, 350 kHz, etc. If the duty cycle is not exactly 50%, there will also be components at the even harmonics: 100 kHz, 200 kHz, ... There is no frequency content below the fundamental.

You could conceivably start with a 50 Hz square wave and filter out the harmonic at 49.95 kHz or 50.05 kHz (Of course picking out just one of these would require a very high order filter). But you can't start with 50 kHz and select out a harmonic at 50 Hz, because 50 Hz is not a harmonic of 50 kHz.

  • \$\begingroup\$ With only open-loop division, almost feels like a 4060 is involved. But anyway, assuming a divide by 1000, I see a 4th order filter, too. Something like \$20\cdot\frac{\log_{10}(2\%)}{\log_{10}(3)}=-71 \:\frac{\text{dB}}{\text{decade}}\$ to snip the \$3\: f\$ frequency back enough. That's a necessary 4th order, I think. \$\endgroup\$
    – jonk
    May 17, 2020 at 5:36
  • \$\begingroup\$ Thanks, okay looks like I'll have to drastically modify this circuit. Will an open-loop 4th order work? I'm assuming that means 4 sets of and RLC filter, one after another? Or it still won't change the output frequency? \$\endgroup\$
    – cpure
    May 17, 2020 at 12:33
  • \$\begingroup\$ Also, from my understanding, a square wave is made up of many sinusoidal harmonics - attenuating the higher order harmonics will not result in a sinusoidal 50Hz waveform? Will it just produce an approximately sinusoidal one at 50kHz? \$\endgroup\$
    – cpure
    May 17, 2020 at 12:37
  • \$\begingroup\$ Yes. A square wave is made up of higher order frequency so a pure squarewave will be made up of infinite sinewaves but the lowest Freq is that of its fundamental. Now of you modulate the squarewave to superimpose a lower Freq component then you can filter to reconstruct this lower Freq component \$\endgroup\$
    – user16222
    May 17, 2020 at 15:44
  • \$\begingroup\$ Thank you, I understand now. I shouldn't have used the term a squarewave of 50kHz as that 50kHz represented the fundamental freq. \$\endgroup\$
    – cpure
    May 17, 2020 at 16:18

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