I have this digital logic circuit homework and I've been trying to solve it for a day and in the end I got a wrong answer. Here is the question:
Create a majority gate using only NOR gates, with 4 inputs a,b,c,d. Which means the output will be 1 if the majority of inputs are 1.
I draw the truth table and Karnaugh map, but they weren't helpful really.
The logical expression will be: a'bcd + ab'cd + abc'd + abcd' + abcd.
If we simplify it we will get: bcd + acd + abd + abc.
I tried to simplify it to a NAND form and I got a very long expression which was not true(I checked it with Proteus).
Can anyone help me please?