Two systems running on independent timebases cannot be guaranteed to be synchronized to each other. In broad terms then, some method of recovering the sender's clock timing needs to be devised to properly decode the data at the receiver.
There’s several approaches to the problem of not-synchronized senders and receivers.
One approach is to reconstruct a clock from information embedded in the data. That is, use a data coding scheme that has some kind of a recognizable pattern that a receiver can lock on to with its tuneable locally-synthesized clock. The receiver then periodically rechecks its alignment against this pattern and makes an adjustment to correct for any drift. Most high-speed serial links (like SATA, PCI Express, USB3) adopt this approach.
Another way is to send a separate timing reference - a source-generated clock that is synchronized to the data. That’s the approach used by HDMI and MIPI. It’s somewhat simpler to implement than the self-clocking methods used by SATA and PCIE, but it requires more wires and introduces skew issues.
Finally, there’s a brute-force variant of the first approach, which is to use markers between framing boundaries. UARTs use this method: the sender includes ‘start’ and ‘stop’ bits between bytes, which help the receiver re-align its bit timing state. The receiver sees the start bit, samples it with a 16x clock, then uses that edge to fix the sample point for the rest of the bits in a byte.
Manchester coding used in Ethernet works similarly, but at a bit-by-bit level. The sent data is XOR’d with the clock, guaranteeing a transition on every bit cell from which a receive clock can be recovered. While this scheme isn't very efficient bandwidth-wise, it is simple to decode using gates and delay lines.