# Is the transistor Q4 in the wide swing cascode current mirror operating in linear region?

In the wide swing cascode current mirror shown below, the transistor Q4 is in the linear region of operation according to the voltages at gate and drain. Is it not necessary for transistor to operate in saturation region? Is it ok to operate in linear region as I am not finding any issue? • No it's not in linear region. – sarthak May 19 '20 at 8:31
• @sarthak it could be good if you could elaborate how it is in saturation region? – Trilok Girish Kamagond May 19 '20 at 8:47
• Hint: What determines if a MOSFET is in its saturation region or not? $V_{DS}$! So what is the $V_{DS}$ of Q4? Indeed just answering yes/no is pointless, no one learns anything from a "it is..." answer/comment. – Bimpelrekkie May 19 '20 at 8:51
• @Bimpelrekkie using the condition I am getting Threshold voltage should be greater than the overdrive voltage for saturation but is it possible to have threshold voltage greater than overdrive? Thank you for your hint. – Trilok Girish Kamagond May 19 '20 at 9:24
• Threshold voltage should be greater than the overdrive voltage for saturation No I do not agree with that at all, you treat the threshold voltage as if it is a variable, is it? go read vtolentino's answer below. It has the correct condition. but is it possible to have threshold voltage greater than overdrive Think about that, what are these voltages? One is an intrinsic property of the transistor and the other one is a voltage that is determined by your circuit. – Bimpelrekkie May 19 '20 at 11:21

## 3 Answers

The pre condition for being in the saturation region is the following:

$$V_{GS}-V_{TH} = V_{OV} < V_{DS}$$

By applying only $$\V_{OV}\$$ to the gate of $$\Q_2\$$ you would be in the threshold between cut-off and linear regions, therefore an additional $$\V_t\$$ is applied. Based on that you can say that $$\Q_2\$$ is at least conducting.

In order to make sure that $$\Q_2\$$ is in the saturated region, its $$\V_{DS}\$$ must be greater than its $$\V_{OV}\$$, and this is accomplished with the $$\V_{BIAS}\$$. In this case $$\V_{BIAS}\$$ has to account for the $$\V_{OV}\$$ of $$\Q_4\$$ and the minimum required $$\V_{DS}>V_{OV}\$$ of $$\Q_2\$$, hence:

$$V_{BIAS} = V_{OV,Q_4} + V_{DS,Q_2}$$

$$V_{BIAS} = V_{OV,Q_4} + V_{OV,Q_2} + V_{t}$$

Assuming that all transistors have the same characteristics:

$$V_{BIAS} = 2\cdot V_{OV} + V_{t}$$

Now it is clear that $$\Q_2\$$ is in the saturated region. What about $$\Q_4\$$?

$$\V_{BIAS}\$$ ensures that $$\Q_4\$$ is either in the linear region or saturated one by applying an effective $$\V_{GS,Q_4}\ = V_{OV}\$$. In order to drive $$\Q_4\$$ into saturation, you just have to apply a voltage slightly larger than its $$\V_{OV}\$$, hence:

$$V_{D,Q_4} > V_{OV} + V_{t}$$

Based on that you can say that $$\Q_4\$$ is in saturation.

$$\V_{D4} = V_t + V_{OV} \$$

$$\V_{G4} = V_t + 2V_{OV} \$$

$$\V_{S4} = V_{OV} \$$

.

Hence:

$$\V_{GS4} = V_{G4} - V_{S4} = V_t + 2V_{OV} - V_{OV} = V_t + V_{OV}\$$

$$\V_{DS4} = V_{D4} - V_{S4} = V_t + V_{OV} - V_{OV} = V_t\$$

.

Q4 is in saturation if:

$$\V_{DS4} >= V_{GS4} - V_t\$$

what leads to:

$$\V_t >= V_t + V_{OV} - V_t\$$

$$\V_t >= V_{OV}\$$

.

Hence

A) if $$\V_t >= V_{OV}\$$ then Q4 in a saturation

B) if $$\V_t < V_{OV}\$$ then Q4 in a linear region

Is it not necessary for transistor to operate in saturation region?

No. See explanation below.

Is it ok to operate in linear region as I am not finding any issue?

Yes, it is ok for a transistor to operate in a linear region. Depends on the situation. Generally, during designing you try to have saturation in all transistors due to e.g. high output impedance. However, you may want some of your transistors to operate in linear region due to their functions (e.g. resistor behavior) or there is no big difference between behavior of a given transistor between linear or saturation region for a given situation or linear region may be forced by the architecture as is in the case of your current mirror.

Condition for saturation is $$\V_{DS}\ge V_{GS}-V_t = V_{ov}\$$. For $$\Q_4\$$, the condition implies $$\V_t \ge V_{ov}\$$. This is usually satisfied in normal circuits. The $$\V_t\$$ is usually of the orders of 400-500mV (40nm TSMC) and $$\V_{ov}\$$ is of the order of 100-200mV.
Choosing a higher overdrive voltage compromises the swing of your circuit. Your circuit behaves as a good current source only for output voltages within $$\2V_{ov}\$$ and $$\V_{dd}\$$. Thus it would be better to use smaller $$\V_{ov}\$$.
You may think in this case to use wider devices and choose lower values $$\V_{ov}\$$. But there is a catch, your noise performance will get worse (because $$\g_m\$$ goes up) as you reduce $$\V_{ov}\$$ for this current biased situation. Thus there is a trade-off between swing and noise.
To optimize swing along with noise, you can choose different overdrive for cascode and the tail transistor. Since the noise of the cascode transistor is negligible due to tail degeneration, you can choose wide device for cascode to reduce its overdrive without much noise penalty. And now, you can choose narrower tail transistor to ensure low noise and still have same output swing.