I'm trying to understand integrator circuit timing, specifically at the point of op amp saturation. Here's my circuit:
The op amp is dual supply +/-12V. Vin
is a square wave varying from -5V to +5V with a 50% duty cycle and period of 40ms - slow enough so that Vout
will reach saturation. Here's the simulation output:
Here's my understanding:
At 6ms the op amp reaches negative saturation voltage and can no longer maintain 0V (virtual ground) at its negative input. V(R3)
is still 5V so current flows into C1
(it can't flow into the "infinite" impedance op amp input). As charge collects at C1
its voltage increases meaning less current flows through R3
.
What is the formula for calculating the time taken for V(R3)
to drop to zero? Is it just 5RC
(which is 5ms) and tallies with the simulation or do I have to take into account the fact that there's charge already accumulated on C1
plates due negative voltage at Vout
?
Additionally, what happens when Vin
changes to -5V (at 21ms). What's the formula for calculating the time taken for V-
to reach zero?