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schematic

simulate this circuit – Schematic created using CircuitLab

I'm designing an LED driver circuit that requires very fast PWM switching at a high resolution (10bit at 30khz requiring a minimum pulse width ~30ns). In order to achieve the pulse timing required, I'm using a FET to shunt the LED driving current to ground during the "off" periods. I'm trying to determine the worst-case power dissipation for the FET, so I can plan heat mitigation strategies when designing my board.

One of the FETs I am considering is the BUK9M52-40E, because it works on logic-level voltages and on/off times in the single ns range. It is not a power MOSFET, however, and does not appear to have a substantial heat sink build in, so I would presumably need to rely on copper pours and thermal vias for heat management.

I will be driving 8 LEDs in series at 24V at a constant average current of 360mA with a peak current of 540mA.

The FET has a maximum RDSon of 52mO at 5V, though I hope to drive it with a 3.3V signal, which from what I can determine would result in an RDSon of closer to 100mO. So given a constant average current of 360mA, and assuming 100mO of resistance, (0.36A x 0.01O) the voltage across the drain-source will be 0.0036V. So the power dissipation in the FET will be 0.0036V x 0.36A = 0.001296W.

This number seems... really low. And given that the FET is rated to 31W, I assume that this is well within its capabilities, and I could probably get away with very little thermal management, and potentially a much smaller FET. Am I correct in this assumption?

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  • \$\begingroup\$ Average the power not the current. When the fet is on, the power is 0.36*0.36*0.1. When the fet is off, the power is zero. During the brief switching transient times, the fet power dissipation will be much higher. How important that is depends on switching frequency. If frequency is low, probably doesn't matter. If the frequency is high, then you may need to account for it. \$\endgroup\$ – mkeith May 24 at 18:40
  • \$\begingroup\$ So if the calculation in the answer is correct, and the power dissipation is 12mW when the power is shunted through the FET, and the datasheet claims that the thermal resistance from the junction to mounting base is 4.8K/W, I'm looking at well under 1C of heat from the power dissipated. I assume that's a low figure, but even if it were off by a significant margin I feel like that's a manageable amount of heat. \$\endgroup\$ – flimsy May 24 at 18:54
  • \$\begingroup\$ 360 mA is a very modest current to switch. Quite a variety of sot 23 FET's will work fine. It seems like you are eager to switch it on and off fast which may be more of a challenge than heat dissipation in your case. So when comparing FET's take a look at the gate charge parameter. FET's with lower gate charge will turn on faster. Will the voltage drop due to Rds cause you any problem? I don't fully follow your application. But if you are calibrating an ADC or something that could be an issue (could introduce an offset). \$\endgroup\$ – mkeith May 24 at 19:05
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Power dissipation is \$I^2R\$ so 12mW, plus switching losses. I didn’t check how realistic your 100m\$\Omega\$ looks. It apparently is not guaranteed, so you’re rolling the dice.

Note that average current is not as important as the average current squared (which is larger than the square of the average current if it’s switching at all).

Note that the switching speeds are specified with 1A peak gate current, so they are assuming a good gate driver. There is a lot of Miller capacitance in your situation due to the large change in Vds.

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  • \$\begingroup\$ Ah ok, 12mW sounds a bit more realistic. Totally forgot there was a different formula for power dissipation. Still seems totally manageable if that ends up being accurate. \$\endgroup\$ – flimsy May 24 at 18:18

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