Can anyone please suggest any methodology to calculate it? (Note: It is not mentioned in the data sheet.)
The input filter specifications depend on: (1) your source impedance and (2) dynamic frequency of the DC-DC converter (3) the spectrum of your step load. (4) radiated EMI of source current and conducted noise as a result of (1,2,3)
This is a 2-way filter spec. If you require load regulation noise on the source, the unbalanced load impedance being the input to the DC-DC can generate noise on the source.
Consider the input cap. as a LPF to the source impedance including path inductance, both DM and CM. Ideally, you want 0 Ohms and expect a well-designed DC-DC converter from Murata will have dampened chokes with suitable Q's or L/R ratios.
Design thought experiment
- Consider the voltage divider relationship of a repetitive pulse with load impedance and the ESR of your input cap
- define your allowed load ripple voltage error / step load current = Step Zout
- Consider the impedance of Cin @ f DC-DC = Zc(f)
- be aware that the C*ESR =Tau product is limited by the type and quality of capacitor material < 10us for low ESR e-cap and > 100us for G.P. e-cap. while Ceramic is lower density much much faster Tau.
- Now define Z cap in terms of minimum C and maximum ESR @ f for step load I at output ripple Vpp
To meet all the considerations in the beginning; it may end up being a CM choke with two caps in a CLC or Pi filter with a certain differential attenuation Bode Plot that is trivial to design on Falstad's Analog filter site after you define impedance and attenuation @f.