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I'm new to circuit design but I'm trying to design a circuit for a power antenna that will send a 5 second pulse whenever it detects a a wire has gone from off-on or on-off.

So far I have designed the circuit below. 12V is is always on and 'T' is the 12V trigger from the radio that is on whenever the radio is. It uses the relay on the left to detect the trigger wire from the radio changing state, the brief moment when the relay switches over and is not making contact with anything, it will make the NOT gate pulse on which will be extended to ~5 seconds or whatever by the time delay relay circuit at the bottom which will run the motor relay.

enter image description here enter image description here

As you can see I'm more familiar with electromechanical and relay logic and was wondering if anybody can provide a more elegant solution preferably using solid state?

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    \$\begingroup\$ Could you please provide a timing diagram? It would be of great help in fully understanding the requirements. \$\endgroup\$ – vu2nan May 28 '20 at 11:29
  • \$\begingroup\$ Hi, I have added a timing diagram, never done one before so apologies if it's non-standard but hope it helps \$\endgroup\$ – Peter Walker May 28 '20 at 20:37
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    \$\begingroup\$ Please add reference designators to each component. Q1, Q2, etc. for transistors, R for resistors, K for relays. Which relay is the time delay one? Do you want to replace it with a solid-state timed switch circuit, or something else? What is the motor current? \$\endgroup\$ – AnalogKid May 28 '20 at 22:01
  • \$\begingroup\$ Thank you very much, Peter! \$\endgroup\$ – vu2nan May 29 '20 at 3:09
  • \$\begingroup\$ But you've missed out the motor reversal function. It was carried forward to my timing diagram till I realized it and corrected it just now. \$\endgroup\$ – vu2nan May 30 '20 at 11:58
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Prelim schematic. U1A is an inverting buffer to isolate the circuit from whatever is driving it. It drives the R1-C1 network that creates a pulse out of the trailing (downward) edge of the input waveform. It also drives an inverter, so the R2-C2 network creates a pulse out of the upward (leading) edge. The two pulses are wire-OR'ed into R4 through D1 and D2.

Either pulse triggers a monostable, U1C and U1D. This makes a 5 second output pulse that drives Q1 and the motor. Note that this is a true monostable. Once triggered, it makes its full pulse width no matter how short or long the triggering (input) pulse is.

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  • \$\begingroup\$ Hi AnalogKid, this is brilliant thankyou so much for taking the time to make this. Quick question, C1 and C2 have the non-polarised symbol on your diagram, will electrolytics still be okay to use? \$\endgroup\$ – Peter Walker May 29 '20 at 9:53
  • \$\begingroup\$ Yes. I use ceramics because I have lots, but an electrolytic will work. - end toward the resistor. Not shown is a power supply decoupling cap. Use another 1 uF between the chip pins 7 and 14. \$\endgroup\$ – AnalogKid May 30 '20 at 1:15
  • \$\begingroup\$ Good design, AnalogKid! I understand it's a preliminary schematic but thought it would be okay to take the liberty to point out omission of the motor reversal function (since Peter has also missed it out in his timing diagram). \$\endgroup\$ – vu2nan May 30 '20 at 12:19
  • \$\begingroup\$ Reversal was snot mentioned in the text. Also, still missing the motor current. \$\endgroup\$ – AnalogKid May 30 '20 at 13:30
  • \$\begingroup\$ Thanks for the capacitor advice, I'll make sure to add that decoupling cap! but yes the reversing will be handled by a separate solenoid so no worries. \$\endgroup\$ – Peter Walker May 31 '20 at 8:33
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Here's the integrated timing diagram.

enter image description here

The timer operating mode required by you is a standard one - 'Signal On/Off delay'.

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