How I can find a practical value of CIO barrier capacitance (primary to secondary side) in digital isolators?
\$\begingroup\$
\$\endgroup\$
1
-
\$\begingroup\$ Actually i want to measure it in a practical way to verify the value in the datasheet. How and which equipment i should use to measure the isolation capacitance of digital isolator? \$\endgroup\$ – Luqman May 29 '20 at 6:34
Add a comment
|
\$\begingroup\$
\$\endgroup\$
6
Actually i want to measure it in a practical way to verify the value in the datasheet. How and which equipment i should use to measure the isolation capacitance of digital isolator?
Use an oscilloscope with known input capacitance (that is quite a common thing to know for a decent oscilloscope) and place the device under test in series with the input to the o-scope and feed an input signal to isolated port of the device and compare the AC amplitudes of input and output and get a decent measure for the attenuation: -
Use a frequency of around 1 MHz so that the scope's input capacitance dominates the input resistance (usually 1 Mohm or 10 Mohm).
Basically you are forming a potential divider and using input and output amplitudes to calculate the "unknown" device capacitance.
-
\$\begingroup\$ Thanks for your guidance. But i could't get you very well. I am little confused about the oscilloscope capacitor and its configuration with my test device? I want to test insulation capacitance of driver ic at V(t)=0.4(2*pi*1M*t). Could you share some circuit or detailed about this method? I would be very thankful. \$\endgroup\$ – Luqman May 29 '20 at 9:56
-
\$\begingroup\$ @Luqman I've added a picture. Hopefully this makes sense now. \$\endgroup\$ – Andy aka May 29 '20 at 10:04
-
1
-
\$\begingroup\$ Could you suggest me some circuit topology and design test method which is more efficient and convenient to use in life time test for digital isolators? \$\endgroup\$ – Luqman May 30 '20 at 9:56
-
\$\begingroup\$ More efficient than what? What is a lifetime test supposed to do? Not enough information to make any suggestions really - maybe consider asking a new question? \$\endgroup\$ – Andy aka May 30 '20 at 9:58
\$\begingroup\$
\$\endgroup\$
1
If no spec in the datasheet, assume 1pf.
if the isolator includes an internal faraday shield, then maybe 0.1pf.
There will always be Efield coupling from input_to_output on the PCB, and between package pins.
answered May 29 '20 at 4:23
-
\$\begingroup\$ @Andy aka Could you suggest me some circuit topology and design test method which is more efficient and convenient to use in life time test for digital isolators? \$\endgroup\$ – Luqman May 30 '20 at 1:04
