The way the input source is applied to the Class AB amp, it seems that there should be no output that appear. Because when the input is positive half cycle, the diode D1 is reversed biased, there would not be an input to Q1 and Q2 is cutoff. Why is there an output?
3 Answers
In this pratical circuit we have this situation:
Without the input signal voltage at \$T_1\$ base is equal to \$0.6V\$ and -\$0.6V\$ at \$T_2\$ base.
But now let us see what will happen if the input voltage is equal to \$+2V\$.
The current flow and the voltage drop is shown here:
The \$D_1\$ voltage drop will shift the input voltage up. So that the \$T_1\$ base voltage is now equal to \$2.6V\$. And \$T_2\$ base voltage is equal \$1.4V\$.
The voltage at emitter is equal to \$2V\$. So now, \$R_1\$ resistor provides \$7.4mA\$ of current. The \$0.2mA\$ entering the \$T_1\$ base, thus the rest of a current (\$7.2mA\$) will continue to flow through the \$D_1\$ diode.
The voltage drop across the \$R_2\$ resistor is equal to:
\$VR_2 = (1.4V - (-10V)) = 11.4V\$
And \$R2\$ current must be equal to:
\$I_{R2} = \frac{11.4V}{1k\Omega} = 11.4mA\$
But the \$R_1\$ resistor provides only \$7.2mA\$. This additional current (\$4.2mA\$) need for \$R2\$ resistor will be provided by the input source.
So, as the input signal increases the \$D_1\$ diode conduct less and less current therefore more current from \$R_1\$ can enter \$T_1\$ base.
And we get the maximum base current when \$D_1\$ diode is OFF.
From there we can conclude that the maximum output current cannot be larger than:
\$V_{CC} = I_B*R_1 + V_{BE} + I_E*R_L\$
\$I_B = \frac{I_E}{\beta +1}\$
\$\Large I_{L_{max}} = \frac{V_{CC} - V_{BE}}{\frac{R_1}{\beta+1}+R_L}\$
And the maximum output voltage is, of course, equal to:
\$\Large V_{OUT_{max}} = I_{L_{max}}\times R_L\$
Also as you can see Vin voltage source doesn't provide any current for \$T_1\$. Input voltage is loaded by \$D_2\$ and \$R_2\$
And for that reason, this type of a "diving" of a Push-Pull output stage is not used in real-world Audio amplifiers.
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\$\begingroup\$ could you eloborate this part "Also as you can see Vin voltage source doesn't provide any current for T1. Input voltage is loaded by D2 and R2"? \$\endgroup\$– PaumdrdoCommented May 30, 2020 at 11:02
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1\$\begingroup\$ @Paumdrdo Sure but what you do not understand in this statement? Also, notice that I showed on the schematics the path of an input source current in gray (4.2mA and 8.4mA ). \$\endgroup\$– G36Commented May 30, 2020 at 12:29
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1\$\begingroup\$ Notice that the Vin source doesn't provide any current for NPN/PNP transistors directly. There is no direct path for current from Vin into the T1 or T2 base. The base current is coming from R1 and R2. Vin only provides a current to D2 and R2 for a positive half-cycle. And to D1, R1 for negative half-cycle. \$\endgroup\$– G36Commented May 30, 2020 at 12:54
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\$\begingroup\$ thank you! I understand now. But why is it an issue in a real application? I still can't picture it. \$\endgroup\$– PaumdrdoCommented May 30, 2020 at 13:10
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\$\begingroup\$ @Paumdrdo The push-pull output stage does not provide any voltage gain. Thus the previous stage needs to provide a "large" voltage swing at the output and at the same time due to the loading effect a fairly amount of current. We need an ideal voltage source "driver". Wich is not an easy task to do. \$\endgroup\$– G36Commented May 30, 2020 at 15:35
Because when the input is positive half cycle, the diode D1 is reversed biased
No, that's not true - the diode is always forward biased in normal operation; the resistors R1 and R2 ensure that this is the case.
Why is there an output?
Because your analysis of the diodes being reverse biased was incorrect. For moderate signal levels the diodes will be forward biased at all times. If you went to extremes then this falls over but, even if the input voltage was a peak to peak amplitude that was only a little short of the power rail, the diodes would still be forward biased.
Andy's answer is fine...this one looks at a different scenario where \$V_S\$ is very large...
...So large that its positive peak exceeds \$V_{CC}\$. In that case, D1 becomes reverse-biased while \$+V_S > +V_{CC}\$.
This is not common practice, since amplifier output never climbs larger than \$+V_{CC}\$, but it satisfies the stated condition "reverse-biased D1". Under normal operating conditions, \$V_S\$ amplitude is smaller, and D1 conducts always.
So why is there output to RL while D1 is reverse-biased in this strange scenario where \$V_S\$ is so large?
R1 supplies base current to Q1. Q1 acts as an emitter-follower, whose emitter voltage is only about a volt lower than base voltage...much current flows from +Vcc, through Q1's collector-to-emitter, into load resistor RL. Current gain of Q1 is usually large, so that current through R1 is amplified by transistor \$\beta\$ to yield large load current through RL. We can ignore D2, and PNP Q2 since Q2 is not conducting.
simulate this circuit – Schematic created using CircuitLab
Since D1 disconnects \$V_S\$ from R1 while \$V_S > V_{CC}\$ the voltage output to RL is "clipped" to a DC voltage slightly less than \$V_{CC}\$. This clipped condition only persists while \$V_S > V_{CC}\$. The clipped voltage output is roughly:
\$V_{CC} {{\beta RL}\over{\beta RL + R1}} - V_{BE}\$