2
\$\begingroup\$

I would like to incorporate a buzzer in a PCB design. It would not be a coil buzzer, but more a piezo buzzer, and its operation is to be controlled with a micro-controller powered by the same voltage than the buzzer driver circuit, so with compatible logic levels.

Everything is powered up at 3V (linear regulator after a single cell li-ion battery), and I would like to maximize the audio power given by the buzzer. As far as I understood, there are 2 main ways to power a buzzer: either the direct way, which is with a MOS for the switching and a parallel resistor across the buzzer to reset it's state. There is also the full H-bridge way, which in an ideal world would double the peak-peak voltage across the buzzer, and thereby allows a gain of 6dB in the audible power transmitted.

I would like to go for the H-bridge method, and I also thought of taking the output of one of the half h-bridge to feed the control of the other one, hence having a single input control pin (which would be used by applying a square wave signal of the desired frequency) for the buzzer sounding. It results in the following schematic

schematic

simulate this circuit – Schematic created using CircuitLab

Hence some of my questions:

  • As far as I understood, piezo buzzer are mostly capacitive loads, so I don't think I need extra protection like free-wheel diode. Am I right ?
  • Would I need any kind of decoupling capacitor across the H-bridge ? The equivalent capacitance of a buzzer of the type i'm interested in is around 20nF, and the consumption current is said to be around 3mA
  • With this circuit, each time I don't apply varying input command signal , the piezo element is going to be forced in a given stressed position for a long amount of time. Could that damage it ?
  • Most of the diagrams I've seen are using BJTs instead of MOSFETs. Is there a particular reason in this application ?
  • I'm thinking about adding some logic or MOS driver at the input, to avoid in-between states which could fry the MOSFETs. Since it's going to be commanded by a Microcontroller with compatible logic levels, and I'm planning on using logic compatible MOSFETs, do you think it worth the extra complexity ? Is there a real risk of frying things up without this input logic or MOS drivers ?

By looking at the schematic, I told myself this was exactly 2 inverted logic gates, with the output of one commanding the input of another one, like on the following diagram (sorry for the screenshot, but I was unable to load a second circuit-lab diagram):

Single input controlled full H bridge  with NOT gates

So I looked around for some logic gates, and noticed that most of them (like the 74LCV2G14) presented consequent voltage drop on the output with respect to the power rail. This would give me a peak-peak voltage across the buzzer of approximately 4V, which is not super high...

  • Isn't there any king of rail-to-rail logic like with op-amps ? I couldn't find one... I only found entries about op-amps.
  • Given the fact that the current is quite low, and internal resistance of mosfets (considering we're in the linear region) is quite low too, I think I could achieve better results with discrete MOS instead of Off-The-Shelf inverter gates. Is that true, or is there any trap I've to think about ?

Some references I've used (I've never used piezo buzzers before):

\$\endgroup\$
1
\$\begingroup\$
  1. It is not advisable to leave DC across the piezo element, it can cause long-term unreliability especially in conjunction with humidity.
  2. The CMOS gates and buffers will have varying voltage drop depending on the current. They are as rail-to-rail as anything. Probably they are fine and may well have a lower voltage drop than a random discrete MOSFET if your drive voltage is insufficient for the latter. A discrete MOSFET may also have a lot of input charge, comparable to a small piezo element.
  3. The piezo element does not have significant inductance, it looks (electrically) more like a voltage source in series with a capacitor, where the voltage source is a function of mechanical strain. If you whack the piezo there will be voltage generated at the terminals (this method is used create a spark to ignite the burners on some BBQ units, so the voltage is not necessarily small). It is recommended to put TVS diodes or similar protection across the piezo element to keep it from damaging the chip.
| improve this answer | |
\$\endgroup\$
  • \$\begingroup\$ Thanks for your reply. I haven't thought of TVS diode, i'll put them in the design ! Got it for the number 2. Only thing is that datasheet for logic gates doesn't always specify drop vs current, but rather a discrete value at the maximum allowable current. Could I infer the drop at a smaller current by assuming the drop is linear with current, or are logic gates more complex ? \$\endgroup\$ – Allart Alan May 30 at 16:03
  • \$\begingroup\$ For drops less than a few hundred mV they behave ohmically, like any other MOSFET with Vds << Vgs(th). \$\endgroup\$ – Spehro Pefhany May 30 at 16:29

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.