I have a custom board with an STM32F407VGT6 and an SD card slot. I noticed that I can only access the SD card if I have a scope probe attached to the clock signal. Holding a scalpel blade between my fingers and touching the tip to the clock pad works as well.

The data signals have 33k pullups, while the clock signal is connected straight to the CPU. I did not design the board (and cannot show schematics/layout, unfortunately, but I'm happy to answer questions for further details). But I looked around and other SDIO examples don't have anything on the clock line either.

What would be the best way to fix this issue? Do I have to add capacitance?

Scope shot of the clock signal

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    \$\begingroup\$ Are you using your 'scope probe in 1x or 10x mode? What do you actually see on your 'scope when probing the CLK line - any ringing? What speed are you running that clock at, and how is the STM32's pin drive strength configured for the SDIO interface pins? \$\endgroup\$
    – brhans
    Jun 1, 2020 at 16:39
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    \$\begingroup\$ You can try adjusting the drive strength of the SDIO signals if that is possible. Often IO pins have a range of drive strengths controlled by register settings in the processor. The clock in particular. You can try adding a capacitor from the clock line to ground. Ideally, you would find a place where the clock trace passes near an exposed ground pad and place the capacitor there. Scrape away the solder mask to expose bare copper on the trace and put a 4.7pF cap to gnd. Try other cap values. 10pF, 22pF, 47pF, 100pF. I would not go higher. \$\endgroup\$
    – user57037
    Jun 1, 2020 at 17:56
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    \$\begingroup\$ If you are able to post a picture of the circuit board it might help us understand what you are up against. \$\endgroup\$
    – user57037
    Jun 1, 2020 at 17:57
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    \$\begingroup\$ The drive strength is at max, and that is the only setting that CubeMX allows when using the SDIO alternate function. I will try to change that from my code anyways. \$\endgroup\$
    – Crazor
    Jun 1, 2020 at 17:58
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    \$\begingroup\$ When you solve this, please answer your own question (totally allowed) and accept the answer so that it doesn't go on forever unresolved. Don't worry about giving credit to me (if I actually helped). \$\endgroup\$
    – user57037
    Jun 1, 2020 at 18:16

1 Answer 1


Reducing the clock signal pin's drive strength to GPIO_SPEED_FREQ_LOW as per the suggestion from @mkeith dramatically improved the signal:

Scope shot of reduced drive strength

(nevermind the probe compensation being a little off, tweaked it after the fact)

This allowed me to change the clock divider for the SDIO peripheral to 8, improving the performance of the card. Before changing the drive strength, I had it at 24 to get anything working. And most importantly: I can now access the SD card without probing the clock signal ;)


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