Basically I wanna know how to calculate the input and output impedance of this basic TTL NAND gate I have looked at several books and websites but found nothing useful , can anyone help me please. thanks in advance.
You may use KVL if you understand the Impedance of a nonlinear switch is based on the incremental resistance or impedance Z= ΔV/ΔI [Ω] for either input or output then add in series each part of the loop.
You can test and measure this impedance using the Vbe-voltage-controlled (hi-Z) current-sinks of a common emitter, which we often use as an "active load". Or you can use the switched signal and measure the Zout from the change in voltage with a load applied and removed. ( A simple example is the Z is matched when the voltage changes 50% when Zo=R load.)
It also helps to remember Ic is controlled by Vbe and teachers always over-simplify to assume Vbe=0.7V but that is only true when Ic is large (20~100mA) and that Vbe number depends on the device but for small currents bulk resistance can be ignored so remember this.
- for Ic = 1.00 mA or 997 uA for all devices, Vbe = 600 mV (0.6),
- the changes below and above this are exponential.
Here, I simulate & use both active and passive load methods to demonstrate Ohm's Law and you may compute the incremental or min/max Z= ΔV/ΔI for each node. The wire or part will highlight in turquoise when the graph is selected and visa versa.
The current and Zin,out is dominated by the base resistance then the collector and then Rc resistance.
Each graph shows the signal Max,min.
I'll let you explore rather than explain everything until you ask a great question.
But to help you get started here's a simplified logic table. Vin Zin Vout Zout ( for Rb=15k, Rc=10k ) "0" Ve1/Ib1~Rb1 "1" Rc "1" >> Rb1 "0" ~100 Ω