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I have a 555 timer which outputs an enable high 500ms after power-up. So it is basically a step response at t = 500ms. I am tasked with processing this enable signal with a 20 Hz square wave signal such that the ouput of the circuit that I'll make will only output the enable signal when the 20 Hz square wave is currently low. My usual way of doing this is make a microcontroller circuit, monitor ports to check state of the 555 enable signal and 20 Hz signal, and make a LATbit = 1 only if ((PORT_20Hz == 0) && (PORT_555_enable == 1)). However, without micro and only hardware, I am lost on how to start the design.

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    \$\begingroup\$ wait, you have a microcontroller but use it only to enable the 555? That sounds err inelegant, to say the least: simply drop the 555 completely and use the microcontroller to generate the square wave. A MCU is superior in basically all aspects at generating a square wave to a 555. \$\endgroup\$ Jun 3 '20 at 11:19
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    \$\begingroup\$ So maybe the functions you are using in your code have a hardware equivalent? As this sounds a lot like homework I won't provide an answer as there is no real approach shown on what you have tried or in which direction you are thinking. I expect that your lessons contain almost everything you need to solve this. \$\endgroup\$
    – Arsenal
    Jun 3 '20 at 11:30
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    \$\begingroup\$ Barring that, research the 7400 and 4000 series digital logic families. There must be something in there which can perform things like "logic" and inversion. \$\endgroup\$
    – rdtsc
    Jun 3 '20 at 12:08
  • \$\begingroup\$ I'm a bit confused because your question is not sufficiently clear. Are you saying that you want the 500ms signal to be chopped at a 20 Hz rate? \$\endgroup\$ Jun 3 '20 at 15:24
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You need to apply basic logic to the two signals you'd like to combine. In this case, if the 555 timer output is \$A\$, and the 20 Hz clock signal is \$B\$, the specific logic you need to apply is \$A\bar{B}\$, read A and not B.

You can implement this with standard logic chips, as shown below. The output of U1, and AND gate, is logic HIGH when both of its inputs are logic HIGH. U2 is a NOT gate, which is an inverter.

enter image description here

The logic gates can be implemented from the standard logic family, like the 7400 series.

I've included two different timing diagrams corresponding to two different 20 Hz signals.

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    \$\begingroup\$ @muyustan -- LaTex, circuitikz using ieeestd logic gates, and tikz-timing package for the timing diagrams. \$\endgroup\$ Jun 3 '20 at 15:18
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    \$\begingroup\$ I answered the question as a means to keeping the skills current! It doesn't come naturally. \$\endgroup\$ Jun 3 '20 at 15:20
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    \$\begingroup\$ @muyustan -- the logic isn't actually implemented, it's just drawn. Code snippet: \begin{tikztimingtable}[yscale=2] 555 timer & [timing/slope=0]5L25H10L\\ 20 Hz signal 2 & [timing/slope=0]10LHLH27L\\ output & [timing/slope=0]5L5HLHL17H10L\\ \end{tikztimingtable} \$\endgroup\$ Jun 3 '20 at 15:26
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    \$\begingroup\$ Yup -- that's it. You have to include the tikz-timing package (via an includepackage command), which isn't part of the base install. I sort of got forced down the path, when I decided that all the stuff I was producing for a course needed to be publication quality. I just couldn't find another way to do it as reliably. \$\endgroup\$ Jun 3 '20 at 15:32
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    \$\begingroup\$ thanks for this nice information. \$\endgroup\$
    – muyustan
    Jun 3 '20 at 15:33

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