LDO output and input capacitor clarification

Question

I would like to understand how to size the input and output capacitor of an LDO.

What I think to know:

• About the input capacitor:

The input capacitor is used for filtering high frequency input components.

Nevertheless in a perfect LDO, the drop voltage across the P-channel mosfet is adjusted so as to maintain the output voltage constant whatever the input signal as long as the input voltage is higher than the voltage drop across the P-channel mosfet plus the output voltage. So if the output voltage is constant, it means that the LDO filters all the AC components of the input signal. So why do we need to add an input capacitor? I think that the bandwidth of the LDO is not sufficiently large to filter all the AC component, especially the high AC components, so an input capacitor is added to filter what the LDO could not filter. Where I can find this information into the datasheet?

• About the output capacitor:

Suppose the load constant at the output of the LDO. The output voltage of an LDO is constant. So the output current is constant. Suppose the LDO is taking no current from the source. So the current taken from the source is equal to the output current and is CONSTANT over the time. So why do we need an output capacitor?

The reasons: During load transient, the output voltage will vary during a time depending on the bandwidth of the LDO. So an output capacitor can be used for helping the regulation. The other reason is for stability concerns.

Nevertheless, I have already seen 100 uF output capacitor on an LDO and a load around 500 mA under an output voltage equal to 5V. What I do not understand is that the output capacitance seems to be a function of the load, something that I do not understand. Does the stability problem imply to increase the output capacitor at this value and is function of the load? I could fairly understand that the overshoot or undershoot during load transient is dependant on the load, but what transient load need to have a 100 µF capacitor?

Here is the LDO.

Answer 1

All voltage regulators want a peaceful life; if there is an output capacitor then any fast cyclic changes in load current are largely dealt with by that capacitor and the lazy output from the regulator is only expected to deal with topping up the charge to the capacitor so that the capacitor can handle the next cycle of load current change. There will be a small transient change of output voltage because the lazy regulator can't be expected to keep up with fast load changes. That is due to: -

$$I = C\cdot\dfrac{dv}{dt}$$

In other words, there will be a ramp down in voltage depending on how high the current is and how big or small the capacitor value is. And the lazy old regulator will try and deal with sorting out the average output voltage in its own time.

In other words, voltage regulators are not as quick to deal with load changes as you might think and therefore, the output capacitor does the main job of keeping dv/dt as slight as possible. Some voltage regulators are better than others of course but they are, after-all, a control loop and won't be as effective in the short term as an output capacitor. Having said that, output capacitors with relatively high ESR are going to cause problems too so, use the capacitor as recommended in the data sheet.

So, instead of the voltage regulator having to deal with step changes in current (without a capacitor) it has to deal with dv/dt (a much slower change).

As for the input capacitor, if there is a load change that causes the input voltage to fall suddenly, the lazy voltage regulator is not well equipped (speed wise) to adjust its series impedance to compensate for that input voltage fall in order to keep the output regulated. Having a capacitor at the input holds-up that voltage to a higher degree than if it were not present. This allows the lazy voltage regulator time to catch up with the situation that is occurring.

The same story if the input voltage changes due to external factors - having an input capacitor can slow down that change and make life easier for the lazy voltage regulator.

So, both capacitors are there to make life easier for the voltage regulator and deliver the performance expectations stated in the data sheet.

Answer 2

The regulator you linked to is not LDO. LDO regulator have even more strict requirements for the output capacitor, it needs specific capacitance range and ESR range for stability.

But for a normal linear regulator, if you have long wires from regulator input to the power source, you have inductance. When the regulator needs to provide a surge current to load it requires surge current from the input and it can't get the current. So the input capacitor is a local bypass capacitor for stabilizing the voltage and allows current pulses to be drawn. Without input capacitor the regulator can turn into an oscillator. As the datasheet says, input capacitor may not be needed if the input bulk capacitor is close, but it also mentions it might be needed if the output capacitance is large.

Sometimes the output capacitor is needed also for stability. The datasheet says it is not required for stability, but it improves output impedance during transients. For example, USB is a hot-pluggable interface with 5V power supply. It requires that a device has a maximum capacitance of 10uF at the input. Surely the regulator output would jump momentarily to zero if you connect an empty 10uF cap. That's why USB hosts need to have enough capacitance at the output, in the order of 200uF, to prevent the voltage dropping too much for other devices.

Answer 3

Usually the capacitor values are in the datasheets of the voltage converters, typical output capacitance is usually 1uF-10uF, so you should have some 1uF and 2.2Uf caps around, they will almost always be he right choice for LDO output for common circuits. They help you smoothen transient response (when load needs a bit more and a bit less current). Because it takes a little time for the chip to adjust to smaller/higher load. And don't understand this wrong: even when load chip simply works, it still uses a bit more and a bit less current all the time, because its internal transistors are switching and doing stuff. And of course if your load chip is shutdown or disconnected, you get sharper current consumption changes that lead to LDO output voltage spikes (up or down depending on what exactly happened). Small caps on the input of LDO compensate for greater/smaller current from input source (usually 0.1uf - 1uf for common circuits). P.S. More competent people with greater experience are welcome to correct me or add to my response if I'm wrong or incomplete.