I am reading this application note from Texas instrument : http://www.ti.com/lit/an/slyt187/slyt187.pdf?ts=1591543592096&ref_url=https://www.google.fr/. The application note give us the transfer function Vout/Iout of an LDO built with a PMOS. Here is the model :
Here is the transfer function :
where R12 is equal to :
I have actually some troubles to understand why Rds is in parallel with the capacitor Cb. The voltage across Rds is equal to (Vin - Vout) and the voltage across Cb is equal to Vout ? So why Rds is in parallel with Cb ?
Thank you very much and have a nice day :D (I know that I have some troubles with AC model)