Being new to PIC, I have been struggling to understand the information in the datasheet.

Q.1. : What does "256 bytes Linear Data Memory Addressing Memory" mean? I am looking at the PIC12LF1552. (datasheet:http://ww1.microchip.com/downloads/en/DeviceDoc/40001674F.pdf).

My attempt: I landed in this post https://www.microchip.com/forums/m1028749.aspx. What I inferred was that Linear Data Memory Addressing Memory was the sum of all bytes of memory of the general-purpose register(s). But when I similarly calculate for PIC12LF1552 , from Page - 15 of the datasheet : 48+ 80+ 80 bytes = 208 bytes. I was expecting this to be 256 bytes. Please let me know what am I doing wrong here.

Q.2. Is "sram" and "Linear Data Memory Addressing Memory" the same thing? For e.g. for PIC16(L)F18326, datasheet (http://ww1.microchip.com/downloads/en/devicedoc/40001839b.pdf) has sram as 2kb.

Q.3. If "sram" and "Linear Data Memory Addressing Memory" are the same where can I find a table similar to page - 15 of PIC12LF1552 for PIC16(L)F18326. The datasheet does not have it, or is there way to know which banks have implemented GPR's. How do I know the address of GPRs which I could get through the table which I will require if I want to store something in the Linear data memory through FSR registers.

The above things have been super confusing to me. Any clues would help.

Thank you very much

  • \$\begingroup\$ See section 3.6.2 on page 30. It allows the disjointed RAM to be accessed as if it was contiguous. \$\endgroup\$ Commented Jun 12, 2020 at 2:38
  • \$\begingroup\$ look at the 32 banks on pages 15-17 .... the 80 bytes from each of the banks, except the last bank are mapped in a linear memory space one after the other ... see page 30 ....... most of that memory space is unimplemented and returns a zero (bank3 - bank30) ........ it is definitely unclear how bank0 is mapped .... the figure on page 14 does not match bank0 on page 15 \$\endgroup\$
    – jsotola
    Commented Jun 12, 2020 at 3:20
  • \$\begingroup\$ hey, look what i just found ... gputils.sourceforge.io/html-help/PIC12LF1552-sfr.html \$\endgroup\$
    – jsotola
    Commented Jun 12, 2020 at 3:26
  • \$\begingroup\$ Hey @jsotola , thanks for the reply. Why doesn't "...from Page - 15 of the datasheet : 48+ 80+ 80 bytes = 208 bytes. I was expecting this to be 256 bytes. ..." this calculation match, any clues on that? However the link which you have sent "gputils..." has 80 bytes * 3 banks = 240 + 16 bytes of common ram space which makes it 256. Is that how its supposed to be done? \$\endgroup\$ Commented Jun 12, 2020 at 3:33
  • \$\begingroup\$ i think that it is 80+80+80 .... and the sourceforge page indicates that it is 80+79+80 \$\endgroup\$
    – jsotola
    Commented Jun 12, 2020 at 3:48

1 Answer 1


As an answer, yes you have spotted an error in the PIC12F1552 data sheet.

The graphic for TABLE 3-3 should look like this:

enter image description here

And yes, there is 256 bytes of RAM in the PIC12F1552 but only 240 bytes can be accessed using the linear address space.

The 16 bytes of Common RAM are not part of the linear address space.


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