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I believe there are many answers to this question, but I would like to have one that works best in KiCad allowing me to run the rule check for all the involved schematics.

What have I tried:

On top of my main schematic A1, with the file name M1.sch (that will be the mother PCB), I created an hierarchical sheet and I gave it a file name, let's say, P1.sch (that will be the plug-in PCB), and the name B1. I copied that sheet and I kept the file name P1.sch, but I changed the name to B2. Both B1 and B2 are using hierarchical pins to connect to the nets of A1 schematic.

P1.sch contains two matched transistors in the same package. I carefully annotated them as U101A and U101B for either B1 and B2, because I want to produce two equal plug-in PCBs (with the same serigraphy) for P1.sch (and not one for B1 and another different for B2).

After that I annotated only the main schematic A1 and tried to assign the footprints to the parts. I was forced to generate the net list again. I selected "Keep existing annotations". Then I got two error lines:

Error: Multiple item U101 (unit 1)

Error: Multiple item U101 (unit 2)

I know this is because the B1 and B2 have the same U101 IC.

The only way I know to solve this is to have two completely separate schematics, in order to produce two different PCBs: one mother PCB and one plug-in PCB that I will produce twice, so that I can have two plug-in PCBs. However, by doing this I can not run the rule check for both schematics. I will not have KiCad aiding me about something being wrong in the two interfaces between the mother PCB and the two plug-in PCBs, which would be nice.

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  • \$\begingroup\$ Hierarchical sheets? \$\endgroup\$
    – Swedgin
    Jun 12, 2020 at 14:11
  • \$\begingroup\$ This might be a really bad idea... But you could use a non printable character, like the mongolian_vowel_separator \$\endgroup\$
    – xvan
    Jun 12, 2020 at 15:45

2 Answers 2

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This is not currently possible in KiCad - you can't create more than one PCB per project in a sensible way. The schematic file format is just text, so you could do some scripting to cross reference the interfaces. The usual way to do this would be to actually make the interface a specification of the design, and have an ECO raised if you change it. Obviously this is unwieldy for a personal (presumably) project.

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You need to make one single schematic for the two PCBs, but you have to include the connectors in this schematic or an annotation indicating that at this place, there will be pin x of connector y. Then you can check or simulate your circuit.

When you do your two different PCBs, you take the same nets, delete those who will be on the other PCB. With nets common to both PCB's, components from the other PCB's must be deleted and pins of connectors must be added.

To avoid mistakes, use the same references for the same connections on both PSB's. Beware that the pin order may be reversed. Still keep the same pin and part references.

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