I am designing a simple Buffer to get the voltage of a high-impedanze source to an ADC (60k Impedance). For that I choosed an JFET in the source-follower configuration.
To bias the gate to ground and keep the input-resistance high, there will be an >1Meg Gate-Risistor.
I am a little bit confused about how to select the Source-Risistor, because the Output-Voltage (Voltage at the source) should be nearly independend of the load. So it should not matter, if I am using a 1k or 100k resistor, does it? Some resources say, with Rs, you bias the JFET.
Could someone please clarify this to me?
A second Question: To get better linearity, I may use a current Source at the Source (biasing the Gate to Vcc/2 with a single supply-voltage) What is the approach to choose a current for that?
Thanks for any advice