I am working on a project. And its description is: Design a 3-digit counter which should has 4 buttons (up, down, right, left).

with pressing the up button the counter should up-count for 5 seconds (each count last 1 second) and after the 5s the counting speed should be doubled and this continues doubling the speed after each 5s till the operating speed reaches 128 then it operates with 128x to the end (for example if we start with 1Hz the final frequency should be 128Hz).

With pressing the down button the above scenario will be reversed (if start with 128Hz we should end up with 1Hz).

with pressing the right button the counter should up-count one-by-one normally. with pressing the left it should acts opposite to the right button.

I started with 74ls192 counter, a frequency doubler (https://i.stack.imgur.com/ViirF.png), frequency divider, etc.

The left and right buttons are trivial. However i had problem with implementing the up and down buttons. i'm thinking of placing a clock generator before them and place a frequency doubler after it then connect it to up-pin in 74ls192. and for down- button we place a frequency divide by 2 circuit then connect it to the IC. I dont know how to manage them with 5seconds.

I implement the following: COUNTER FULL the problem is it does not work? where i doing wrong?

and inside each Block is something like this: 74ls192

So could you please guide me to solve this problem? Or how to start tips.

P.S: it is also required to design every single function with only logical gates. (so i have implemented 74ls192 by gates myself from http://www.datasheetcafe.com/sn74ls193-datasheet-pdf/) and even flip flops (which took a lot of time )

Any help will be greatly appreciated.

  • \$\begingroup\$ You never actually stated what the problem was that you had. You never drew your circuit where you got to. \$\endgroup\$
    – Andy aka
    Jun 13, 2020 at 15:26
  • \$\begingroup\$ Its a bit messy. I'll add it to the post. \$\endgroup\$ Jun 13, 2020 at 15:37
  • \$\begingroup\$ 74LS192 is a 4 bit counter. With the kind of 128x clock you are talking about, I hope you have the idea that the counter will overflow after every 16 clock cycles. \$\endgroup\$
    – paki eng
    Jun 18, 2020 at 6:25
  • \$\begingroup\$ Why do you implement 74LS192 using gates? What kind of free time have you got? ;-) \$\endgroup\$
    – paki eng
    Jun 18, 2020 at 6:31
  • \$\begingroup\$ It wasn't intended. our instructor want it to be a challenge... \$\endgroup\$ Jun 18, 2020 at 7:11

1 Answer 1


Start with the fastest clock you need and use a series of T flip flops to divide the clock frequency by powers of 2. So you have highest frequency f, then the first T flip flop produces f/2, the second produces f/4, the third produces f/8 and so on until the seventh produces f/128.

Then use a multiplexer to select one of the 7 clocks and provide it to the clock input of the counter. The multiplexer address would itself be a counter that increments after 5 seconds.

  • \$\begingroup\$ I hope you understand this, but if you want more detail, I can make some effort to make a block diagram and edit my answer. \$\endgroup\$
    – paki eng
    Jun 18, 2020 at 6:30
  • \$\begingroup\$ Thank you. I'll try that. apart from that, is my circuit correct? any missing circuity you would suggest to mange the 5s (just use a timer?)? \$\endgroup\$ Jun 18, 2020 at 7:09
  • \$\begingroup\$ You can use 555 astable circuit to generate a 0.2 Hz square wave. But I can't say anything about your circuit. \$\endgroup\$
    – paki eng
    Jun 18, 2020 at 7:46
  • \$\begingroup\$ Thank you. Could you please tell me how to cascade the BCD counters, because when i run my design it counts from 18 to 29 then 20 then 21 and so on. then i detect that when QD of first BCD getting high the "up" of the second counter becomes high and starts to count, so i decided to add an AND gate which its inputs are QA and QD, so that once the first counter reaches 9 or "1001" then the "up" input of second counter gets active, But it does not work either. how should i fix that? \$\endgroup\$ Jun 18, 2020 at 7:58
  • \$\begingroup\$ Cascading is easy with 74192. Just connect the BO of current stage to Down of next stage and CO of current stage to Up of next stage. \$\endgroup\$
    – paki eng
    Jun 18, 2020 at 8:28

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