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I'm new to IC design and just wondering if it possible to order IC production if you have all necessary design files (like RTL design, chip layout from Cadence for example, etc.)
If it is then what are these companies and what is the approximate cost (for a relatively small IC like for example an ethernet PHY?) \$ \ \ \ \$
You'll want to check out multi-project wafer services, the best-known of which is MOSIS.
It is possible, but it is neither quick nor cheap.
There are several different types of fab you could consider talking to. Near me, I have two options, one is a large university which has their own microelectronics centre. They are a little cheaper and keen to try things out, but you'd have to justify why your design is interesting from an academic point of view. I would probably pick them if I want to make a handful of MEMS devices for R&D. The other is a moderately sized company which operates three small fabs and makes a point of begin able to do small runs and prototypes. They might be a better choice for a small run of chips for products to sell. You wouldn't want to start with one of the really big fabs, not unless you're willing to commit to spending a lot more.
Once you have a fab, you have to start the process of adapting your design and their processes to work together. You buy wafers, get masks made etc, test the results, and repeat as necessary. Doing a small batch of wafers, with only a few processes (so probably simpler than your PHY) costs a few thousand pounds. Developing it to the point of reliably producing 8 inch wafers full of mostly-working dies might cost £100k or so. Working up to a fully packaged IC, with all the necessary QA processes etc. might need an investment of a couple of million. These are very rough numbers, treat them as order-of-magnitude guides nothing more.
The short answer to ‘how’: contact fab vendors and describe what your requirements are to figure out what services you will need. They will walk you through the process and identify your costs for budgeting.
Who are these companies? The best-known wafer fabs are TSMC and Globalfoundaries. There are others that specialize in smaller wafers/older processes, like SMIC in China.
Fab companies provide various levels of service depending on your needs and how much money you have to spend. In your case you might need to work with a third-party provider who can do all the back-end work for you vs. working directly with a fab. Fabs can identify appropriate partners who do that service.
What’s it going to cost? The main up-front cost is the mask set. Three factors influence this: die size, number of layers, and process node. For a small, mixed-signal chip like an Ethernet PHY, it could use an older process like 180 or 120nm. Ballpark for such a mask set would be about $75-150k.
The next fixed expense is test fixtures and test development. This can run to multiple tens of thousands. Add to that fixtures for accelerated-life and ESD/latchup testing.
You must also do a package. Even if you choose a standard type, it needs to be laid out with an appropriate bonding scheme for your die.
There’s other expenses I’m certainly missing here but you get the point: expect up-front costs in the multiple hundreds of thousands even before you get your first packaged part.
Different companies can negotiate pricing. In one model, they can bury some of the fixed expense by increasing the cost of the delivered IC, but they will pressure you to take agreed-upon quantities.
Finally, if your design is of good quality with unique differentiation, you could possibly sell or license it to an existing company in that market space and defray some of your costs. But for it to have value, it needs to be proven in silicon. A lower-cost way to do that is to put your die on a ‘shuttle’ - a multi-project wafer - to get some sample chips for testing.
You might want to check out FPGA for smaller series. Some of them contain quite a few logic blocks, and perhaps even som analog circuits.
Wikipedia has some descriptions: https://en.wikipedia.org/wiki/Field-programmable_gate_array
