At the instant the start bit arrives the receiver knows only one thing; the nominal time duration of one bit. The receiver has its own clock running at typically 16 times higher than the expected data rate and, these come together in the picture below: -
So, in the above picture, the receive UART counts 8 clock cycles from the instant that the start bit falls to zero. After 8 clock cycles, it knows it is approximately in the centre of the start bit.
From that point it counts 16 clock cycles to position itself at the approximate centre (mid-bit) of the first bit. It then samples that data and restarts the clock counter and, another 16 clock cycles later it will be in the position of the 2nd bit and it samples that bit.
This continues until all the bits of the UART transmission byte have been received.
how does bits gets synchronized and whom those bits gets synchronized
Bit sampling is synchronized to the falling edge of the start bit and the receiver assumes that its clock (and the clock of the transmitting UART) are fairly well matched. There can be a little drift and because the byte length is quite small this doesn't erroneously position the mid-bit too far off but, if clocks continue to drift relative to each other (or the baud rate changes) then this type of transmission will fail.