How would you all implement a simple delay of a signal?

Question

I am a console game developer by profession, and has no formal education on electronics / electrical engineering. In gaming lingo, a 'noob' if you will, at it. And yet I have a new found passion for fiddling with this wonderful craft.

At the moment, I am trying to learn and have fun while make a 'scrolling LED' toy for my daughter. My idea for it is quite simple, I have a shift register (SN74HC595), and 8 LEDs taking input from it. There will be two buttons. When button A is pressed, it 'inserts' a 1 into the register, and when B is pressed, it pushes a 0 into the register. With this you can 'program your LED pattern'. And then with the flick of another toggle, the shift register will get clocked (using a simple RC astable multi vibrator) (looping QH' to QA). Making the pattern to scroll. Simple enough.

But, my problem comes at the part which does the 'inserting' of data into the register. Let's say, to insert a 1 to the register when button A is pressed and released, I first have to pull the 'SER' (data) line of the register high, then after a brief period of time (setup time, 25ns for the register's datasheet) pull the SRCLK (Shift register clock) high. And that's it. However..

My switch buttons are debounced. I learned about debouncing from this wonderful article : Debouncing. I didn't had any parts that would help me with hysterisis so I had to just ignore it. But using the methods specified there, I was able to calculate the exact values of my resistors and cap, to keep the voltage just right while my switch clank and knock with itself. The switch bounces for 10ms ( got myself a cheap O-scope, china one. But does the job ), so am keeping it steady for about 20ms. My calculations and the results of simulating it using Multisim.com matched. So my button debouncing works as expected.

Except, when I try to use that 'signal'. I have to do two things with this signal. First, route it to SER line of the register. And then after a brief delay (25ns - a few ms?) route it to SRCLK line to clock it. In other words, first pull SER high, then pull SRCLK high. And to introduce this 'delay' I turned to the only delay mechanism I know - RC network. So once I get the debounced output, I charge a cap through a resistor, and that charged output is what I use to drive SRCLK.

The moment this new capacitor and resistor gets added to my 'debounce circuit',my calculations for the parts value doesn't hold true anymore because the new 'delay' capacitor and resistor is now in parallel or serial (I don't even know anymore) with my good and previously well behaving 'debounce' capacitor.

All this predicament makes me wonder if even using an RC delay timer is even the right thing to do. How do I connect input from a debounced switch to a node that already has a capacitor, without messing up all my calculations.,or to rephrase it, How would you all implement a simple delay of a signal without using all fancy micro controller etc..?

Here is the schematic of the denounce and delay. Note that this is only addressing the single button (not both A and B). SW2 in the first image is just for debugging.

^{simulate this circuit – Schematic created using CircuitLab}

Answer 1

There is just one problem, the debouncing method you use will make extremely slowly rising and falling signal edges, and the 74HC595 can work improperly because of it. The chip datasheet says that at 5V supply, signal edges must change faster than 500ns/V, so for a 5V change, it must use not more than 2.5 microseconds during the transition (or maybe 1.5 microseconds during the range between 1.5V and 3.5V)

Ganssle article does use resistors and capacitors to filter short spikes into slowly changing voltage, but it also mentions that many chips don't like it when they are triggered with slow edges, and it is squared up into single fast edge with a Schmitt trigger logic gate.

Other than that, you can use a Schmitt trigger to square up a signal for data input, and simply use a fast RC filter after that to delay a signal for few nanoseconds and another Schmitt trigger to square up the clock pulse.

Answer 2

Change your debounce circuit by a factor of 10 -- i.e., decrease the resistors by a factor of 10, and increase the capacitor to 1 µF. Now the "debounce" circuit has a (kind-of) output "impedance" in the 5k-10k range, which means your 100k circuit that follows it will have much less effect on the debounce circuit. (It will have some, but more manageable). If you need yet-more-delay, you can follow your 100k circuit with a 1M resistor and .01 µF capacitor -- because you are driving HC CMOS inputs which have extremely high input impedances.

I am not going to comment on your debounce circuit, since it is working for you, based on your comments. However I will just say (and may be wrong) that the diode in your debounce looks wrong to me (backwards). My thinking is along the lines of "the switch will short to ground many times rapidly in succession" and the first "short to ground" will discharge the capacitor thru the diode (if you reverse it) but due to the R's, it takes time for the capacitor to return to V+ hence subsequent bounces do very little as the voltage on the cap is still close to zero. FWIW.