# CD4053B Supply Voltage Ambigious in Datasheet

I'm designing an analog voltage switcher based on the CD4053 and +-15V rails. By accident, I ordered the HEF4053 which clearly states that Vdd-Vee may not exceed 18V.

Now I'm looking at the TI CD4053B datasheet where it states:

Supply Voltage (V+ to V-, Voltages Referenced to VSS Terminal): Max 20V.

The question is: Can I run a CD4053 from Vee=-15V and Vdd=15V?

• I don't think so I think you can go with +10,-10 Commented Jun 18, 2020 at 20:36

Reference: Motorola CMOS LOGIC DATA DL131 Rev 2.

VDD > VSS > VEE
maximum between VDD and VEE is -0.5V to +18V. VSS is somewhere in-between.

"$$\V_{DD}\$$ voltage is the logic high voltage, the $$\V_{SS}\$$ voltage is logic low. For example, $$\V_{DD} = 5V\$$ = logic high at the control inputs. $$\V_{SS} = GND = 0V\$$ = logic low.
The maximum analog signal level is determined by $$\V_{DD}\$$ and $$\V_{EE}\$$. The $$\V_{DD}\$$ voltage determines the maximum recommended peak above $$\V_{SS}\$$. The $$\V_{EE}\$$ voltage determines the maximum swing below $$\V_{SS}\$$.
[...]

If voltage transients above $$\V_{DD}\$$ and/or below $$\V_{EE}\$$ are anticipated on the analog channels, external diodes are recommended [...] small signal types able to absorb the maximum anticipated current surges during clipping."

Perhaps Texas Instruments allows a few more volts headroom than other manufacturers, but a difference of 30V between VDD and VEE is outside spec.

No, you cannot. The absolute maximum total voltage across the chip is 18V or 20V (15V nominal). You would be applying 30V.