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In order to aid in testing of the design, it is required that we put it into a "debug mode" whereby specific type of error conditions will occur at random intervals. We must then monitor the impact of these errors on the rest of the system. The type of error to be generated can be specified when we enter this "debug mode".

I can see that LFSR can be used to generate random numbers which is an interesting subject and that we need a seed to start them. However, I have found that I already have certain sources of noise in the system. There are 3 sensors on the board, one is for temperature, one is for acceleration and orientation of the device while the third basically converts readings from a transduer via ADC conversion. All three sources contain noise of course. The range and "at rest" value of these sources are not similar.

How should I exploit one or more of these sources in order to generate random number within specific range e.g 0 to 100 or -1024 to + 1024? Should I just take some bits from the ADC conversion from the sensors and not use the LFSR at all?

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    \$\begingroup\$ I think the first question should be "how random do you need the output to be?". Without an answer to this, it's hard to know whether a simple LFSR is good enough or not. \$\endgroup\$ – scary_jeff Jun 18 '20 at 7:09
  • \$\begingroup\$ How random as in? Are there levels of being random? \$\endgroup\$ – Quantum0xE7 Jun 18 '20 at 9:54
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    \$\begingroup\$ Very much so. A 10-bit LFSR would be more than sufficient if used for example in a coin toss simulator for a simple game, but would be nowhere near random enough for an audible white noise generator. A similar difference in requirement might apply if you were testing for error handling in a bluetooth speaker vs a space craft. You might also care about whether the output is detirministic; using ADC noise might give a more unpredictable output. If this then causes an error in your design, you might have no way to recreate that exact scenario when testing a fix. \$\endgroup\$ – scary_jeff Jun 19 '20 at 8:19
  • \$\begingroup\$ So I just create a 10 bit LFSR while ensuring that it uses a maximum length polynomial and use the state of the LFSR chain as the random number? \$\endgroup\$ – Quantum0xE7 Jun 29 '20 at 1:18
  • \$\begingroup\$ That could certainly work. Whether it will be good enough might depend on how many error conditions you are testing for; if there are 5 or 10, a 1023-length sequence could be sufficient. If you are testing for 100s of error conditions, perhaps not. Without knowing anything about the application it's pretty well impossible to suggest an appropriate way to test it. \$\endgroup\$ – scary_jeff Jun 29 '20 at 7:21
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There are other sources of noise inside the FPGA that could exploit and even combine with your other sources, provided that you can modify the design.

There are methods of using the jitter of the FPGA's ring oscillators or using High Fanout Nets to accomplish true randomness. This paper discusses the implementation a TRNG of high fanout nets. Full disclosure, I have not implemented this myself, but I have seen a similar implementation.

Alternatively, I have found this pseudo random number generator that it somewhere in between LFSRs and a TRNG. Its stated purpose is the following:

The PRNGs in this library are useful to generate noise in digital signal processing and to generate random numbers for monte-carlo simulations or for games.

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