I have been given the task of designing a 12-bit pipelined adder:

enter image description here

There are 4-bit adders connected by latches. Why are latches used between the 4-bit adders? Is it for synchronization?

  • \$\begingroup\$ I haven't designed it yet, this is a project , we are supposed to use flip flops but I am unable to understand its need, also could you be a nicer i am new to this field. Thanks \$\endgroup\$ – Ashlesha Sunil Agate Jun 24 at 5:15
  • \$\begingroup\$ @jonk Comments should be respectful, please read electronics.stackexchange.com/conduct \$\endgroup\$ – Voltage Spike Jun 24 at 15:44

The adder will have different inputs at each clock cycle. The output will appear two clock cycles later. You need all paths from input to output to have the same (cycle) delay so the outputs & intermediate results correspond.

It might help to draw a line through the corresponding latches to separate the 'time zones' as such.

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Yes it is for synchronizing the carry from one 4 bit adder to the next.

The adder at the bottom performs addition of the lowest significant bits. The higher input bits are held in latches until the carry is ready for them at the next clock cycle.

The sum out of the lower bits is held until the sum of the higher bits are ready.

This technique is used if the adder word is too large (too wide) to complete an addition in one clock cycle.

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  • \$\begingroup\$ i want to know what happens if the flip flop is removed? \$\endgroup\$ – Ashlesha Sunil Agate Jun 24 at 5:18
  • \$\begingroup\$ Based on what I wrote, what do you think happens? Do you understand the role of a carry? \$\endgroup\$ – P2000 Jun 24 at 5:20
  • \$\begingroup\$ Why cannot i directly give that as input to other adder is what i am asking \$\endgroup\$ – Ashlesha Sunil Agate Jun 24 at 5:33
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    \$\begingroup\$ It's a matter of WHEN to give that as input to other adder. Do you understand the role of a carry? \$\endgroup\$ – P2000 Jun 24 at 5:36
  • \$\begingroup\$ yes, so that the corresponding carry gets transferred for the cycle that has the corresponding sum bits, now i get it. \$\endgroup\$ – Ashlesha Sunil Agate Jun 25 at 0:15

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