I am new to layout designing. I am using Eagle 9.5. Here is the layout design of my project:
Right section of the PCB is for analog circuit. middle section is for DAC and ADC and digital output of those two ICs are going to two of the long pin headers. There are two analog switch ICs which are controlled by SPI and they are in the analog section but it will be active only when there is no analog signal present. (switch will select certain resistor and capacitor for gain setting and compensation respectively). left side of the PCB for power supply. whole board will sit on Atmega development board.
I am using 4 layer board and layer stack are: top: signal
2nd layer: power supply (it's not a plane but thick traces)
3rd layer: signal layer
bottom layer: ground plane. Analog signal frequency: 1-100khz
Digital signal frequency: upto 18Mhz
Analog and digital signals doesn't overlap on DGND and AGND plane (there are few exceptions)
My colleague told me that there will be potential difference between PGND in bottom layer and AGND of analog section and it is not good for the design but my understanding is that if I have intact ground plane then it will not be any potential difference. it only happens when I share ground trace with multiple components and then connect to ground plane. like this:
Please tell me, is my colleague correct or my ground plane is alright?
EDIT : here is my load which is connected to the virtual ground of the trans-impedance amplifier. load is basically electrochemistry cell. it might not draw any current. Because of reaction in the cell it may generate few nano amperes to milli amperes.
Basically, I am implementing signal processing for impedance spectroscopy. few hundreds of millivolt signal is given to the load as a excitation signal which will be pure sine wave with dc offset. so, range of the signal could be -2.5v to +2.5V