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I went through following app note, where OPA333 is used in 400V bus current sensing application, also i have seen current sensor which have term called common mode voltage, which is specify the max voltage that can be applied to sensor inputs (current amplifier).

OPA333 does not mentions anything like that,

I don't understand how OPA333 withstand 400V on its input terminals without burning up?

enter image description here

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The OPA333 isn't referenced to ground. It is referenced to the 400V supply bus via the zener diode and Rz. Well, technically the OPA333 is using 400V-5.1V as it's reference, but that reference is always relative to the 400V rail.

Instead of the OPA333 being powered by a potential difference that "sits above" GND by 5.1V, it is a voltage that "hangs below" the 400V bus by 5.1V.

Since the current sense resistor is on the high side and only has a tiny voltage drop across it, it is well within the OPA333's power supply which is 400V for the positive and 400V-5.1V for the negative supply terminals

Therefore, the OPA333's output is basically ~400V above GND and so needs to be re-referenced (shifted) to GND so that the other circuitry (which is GND referenced) can read it. This is done with the P-FET which is rated for 600V since it does have a huge voltage drop across it.

The most interesting part of this circuit is actually the level shifter. I understand why the current through both resistors has to be the same but I don't understand how the negative feedback is able to turn on the PMOS by just the right amount to drop all the excess voltage from the 400V rail.

EDIT: I sort of see how the feedback works now but it's pretty subtle. All the negative feedback does is turn on the PMOS just enough so that the two OPA333 inputs equal each other. This causes the voltage across R1 to match the voltage drop across Rshunt. That's the most direct thing the negative feedback does and the only thing the op-amp is really doing/controlling. Everything else: the current mirroring, the level shifting, and dropping the excess voltage is a byproduct.

The currents through R1 and R2 must be equal, and since their resistances are equal then their voltage drops must also be equal. This achieves the voltage mirroring and level shift. Therefore all the remaining voltage must be dropped across PMOS. It has no choice. It's the most important function of the circuit but is also the most indirect result of the whole operation.

Like a fancy version of how a resistor drops all the excess voltage so the LED doesn't have to. It just has no choice because the LED voltage drop already has its voltage drops defined and fixed.

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    \$\begingroup\$ Is the 10K resistor intended to protect the OPA333 in case the load is sufficient to create a large voltage drop across the sense resistor, but otherwise have minimal effect? \$\endgroup\$ – supercat Jul 2 at 17:36
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    \$\begingroup\$ @supercat - It's almost certainly for that. It's fairly common for op-amps to have input structures that look like antiparallel diodes between the plus and minus inputs. If there was ever > ~0.6V across the shunt resistor, it would blow the input of the op amp up without that resistor. (I'm not sure if this op-amp is like that, the datasheet doesn't have an equivalent input circuit. Arrrgh!) \$\endgroup\$ – Connor Wolf Jul 2 at 22:30
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    \$\begingroup\$ If anything, the most stressed part of that design is that 600V P-FET; if the sensing current gets large, so is the power dissipated by this transistor. \$\endgroup\$ – Jarhmander Jul 3 at 15:39
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    \$\begingroup\$ The 10K resistor at the + input limits the worst-case current drawn from the op-amp inputs (load short-circuit or current shunt open circuit) to about 40ma. The real schematic (unlike the simplified upfront one) has a 50mA fuse and a 1K resistor to protect the FET. \$\endgroup\$ – Peter Green Jul 19 at 5:51
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    \$\begingroup\$ This means that worst-case (sustained load short or shunt open) you stand a good chance of killing the op-amp (it's datasheet says input currents caused by out of rail voltages should be limited to 10mA) and are also likely to blow the SMT fuse but the rest of your system should be fine. \$\endgroup\$ – Peter Green Jul 19 at 5:59
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No part of the op-amp is grounded. The whole op-amp is referenced to the 400V rail. The positive supply terminal of the op-amp is 400V. Because of the 5.1V Zener diode, the negative supply is 400-5.1=394.9V. This means that, as far as the op-amp can tell, it is running from a 5.1V supply. Rz will be dropping 394.9V. Depending on how much current is going through the Zener and the op-amp, Rz may dissipate a lot of power.

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  • \$\begingroup\$ From the linked PDF, Rz is recommended as 5.26𝑀Ω, so the dissipated power will be just 32.48𝑚𝑊. \$\endgroup\$ – rodrigo Jul 2 at 14:17
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I'm a bit curious, since the circuit's function is quite well described in the application note you've ostensibly read (in order to find it in the first place)!

System Design Theory

Shown in Figure 2 is the precision, rail-to-rail opamp OPA333 used to mirror the sense voltage across the shunt resistor on to a precision resistor R1. OPA333 is floated up to 400 V using a 5.1 V zener diode between its supply pins. The opamp drives the gate of the 600 V P-FET in a current follower configuration. A low leakage P-FET is chosen to obtain accurate readings even at the low end of the measurement. The voltage across R1 sets the drain current of the FET and by matching the resistor R2 in the drain of the FET to be equal to R1, VSENSE voltage is developed across R2 (VR2). Inputs of the current monitor INA226 are connected across R2 for current sensing. Hence the current monitor does not need the high common mode capability as it will only see common mode voltages around VSENSE which is usually less than 100mV. INA226 was chosen for current, voltage and power monitoring as it is a high accuracy current/voltage/power monitor with an I2C interface.

The INA226 can also sense bus voltages less than 36 V. Since the bus voltage employed here is 400 V, a divider is employed to scale down the high voltage bus to a voltage within the common mode range of INA226. In this case a ratio of 64 is chosen and hence the bus voltage LSB can be scaled accordingly to obtain the actual bus voltage reading. In this case the a modified LSB of 80 mV could be used. Precision resistors are chosen for the divider to maintain accuracy of the bus measurement.

Bold is mine.

The application note this schematic is from is quite thorough in documenting basically all the relevant design decisions (excepting the 10KΩ resistor on the negative input, annoyingly).

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