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So I'm going through my zyBooks Digital Logic textbook where it introduces FSM's, and in typical fashion of my textbook, it's horrid at explaining things (Highly recommend you NEVER purchase a zyBooks textbook, if you can avoid it.)

The textbook describes an FSM as, "An FSM (finite-state machine) is a computation model capable of describing sequential behavior." It then gives a 6-step animated model of a couple FSM's to try and explain things. I understand what's occurring at each step, but I'm uncertain how it describes a sequential circuit. I'm hoping someone can help clarify how the FSM describes a sequential circuit.

SM

Really appreciate your support. Thank you all so much

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  • \$\begingroup\$ This does not describe a sequential circuit so much as it describes a function which a sequential circuit could be readily constructed to perform. Think of the FSM as an intermediate step between identifying the problem and building hardware, specifically one of getting the problem into a hardware-friendly form and plan of action. The actual sequential curcuit would be a state register surrounded by logic paths which operate on its current output to produce the new value latched at the next clock. \$\endgroup\$ Commented Jul 6, 2020 at 11:15

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It is better understood if the FSM is given a simple task to do, which can be done only in a specific order. An example I did with LabView was to take sound samples of a dog barking. I used Audacity to capture the sound and store as .wav files which LabView can open as an array of floating point samples.

I needed to convert them to simple envelope shapes equal to the width of the bark, so a large dog has a bark about 250 mS in width with a 250 mS to 500 mS gap between barks. Yes, I was building a bark detector. So I wind up with 12 seconds of raw audio with 11 "bark" samples. Now the information I want has to be extracted. If no error flag sequence continues until done. An error flag stops program because downstream stages do not have valid data to work with.

  1. Do samples at 44.1 KHZ, 16 bits wide, repeat until 10 or so clean samples or time-out to abort. Set error flag.

  2. Load raw waveform buffer with lightly filtered samples, a simple FIR filter. If no samples set error flag.

  3. Use noise gate to remove residual and background noise so baseline is clean. If no input or out put set error flag.

  4. Isolate 1 bark sample as a 250 mS burst of various frequencies if above minimum threshold. If no output set error flag.

  5. Use IIR to create 91 samples that rise with frequency content. Close but not yet done. If no output set error flag.

  6. Extract spectral density spikes then use noise gate to limit to strong samples. Use 22 point FIR to blur spikes into lumps. 2 lumps in frequency per bark. 1 at 350 HZ to 450 HZ, another lump at 650 HZ to 900 HZ. If no output set error flag, else program is done.

All of this to show me how dog barks go up and down in pitch a great deal, and of course vary in spacing, indicating how aggressive the barking is.

Each of these steps must be in the right sequence. Each step can only pass or fail. If it fails an option of a retry is possible or the program aborts. If it passes then it goes to the next step/state. So each of 6 states can pass and go to the next state, or loop and retry until a time-out occurs. It could be programmed to start at state 0, but that makes sense only if state 0 failed. Logically it could back up to any previous state and try again. It CANNOT skip states or run them out of order, or you will not get the expected output, if any at all.

You are correct in that the book is confusing. It assumes each state can return to a previous state, but other than looping to retry a task, errors flags often force a return to state 0. Looping back from state 5 to state 3 implies that state 3 can be reset, its data and status buffer cleared for another try, and a master retry counter allows only so many retry's before it stops the program. Remember that with advanced programs each state may have its own data and status buffers, so it takes extra code to go back several states as a retry option. For the same reason that "wait" loops have a time out.

If important I can do screen-captures and post them in this answer. They are in HDTV format which I will need to convert to jpg. enter image description here

This is the final output of my program. Some out-of-band noise is shown, as it looks odd to see the image with no noise at all. Low frequency noise is likely wind blowing into microphone. High frequency noise is people talking not far away. A single bark from a large dog has substantial output at about 400 HZ and 770 HZ. enter image description here

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  • \$\begingroup\$ That helps. Thank you @Sparky256 \$\endgroup\$
    – GainzNerd
    Commented Jul 4, 2020 at 8:26
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    \$\begingroup\$ States having additional state is contrary to the finiteness of a finite state machine. It may be mathematically possibly to convert such a description into one of a larger FSM but it is not the description of an FSM as the whole point of an FSM is to model the entire state. FSMs may interact with external things which have state, but they interact with them (drive outputs to, depend on inputs from), they do not model them unless they also model that state as part of their state. \$\endgroup\$ Commented Jul 6, 2020 at 11:08
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A sequential circuit is often drawn like a feed back loop, with input(s) coming in on the left, a block of analog and/or digital logic generating the output(s) and feeding into the memory section with some of the outputs and then the output of the memory section feeding back into processing block. Mapping to a Finite State Machine drawing basically requires unrolling the loop. Since it is a sequential circuit the memory goes through discrete steps and thus doesn't have any capacitors or inductors, only digital storage devices like flip-flops or individual bits in a latch. Typically there is one bit of storage for each state although it is possible to use a small number of gates and treat them like a binary number to define which state the circuit is in, but this approach makes the logic block very complex as it must decode every state number as well as combine the inputs to generate the correct outputs and which state to transition to. But you can always replace the binary count with a separate memory cell for each state and greatly simplify the logic.

enter image description here

The first step is to look inside the memory block and look at the individual memory cells. The logic block will contain the logic to select which state to transition to next based on the current state and any inputs that affect which state to go to so I have drawn it here to show the logic output going to all memory cells and the state active signals all being combined to feed back into the logic block. For a finite state machine only one memory cell or state can be active at one time so the logic must generate exactly one trigger to activate the next state. Then each memory cell sends a signal feeding back into the logic that goes high when that cell is active. This is then combined with the current input by the logic block to generate the outputs and activate the next state by using the active line from the current state and any conditional logic used to test the inputs if there are multiple next states from the current state.

enter image description here

The next step is to look into the logic block and see which gates are active for each memory cell, which output(s) are controlled by each state and the logic, if any, controlling which state to go to next. It should be possible to separate the logic block into signals that only depend on the inputs which can be ignored for generating the FSM,and signals that depend in whole or in part on which memory cell is active. The memory cell dependent part can further be divided into circuitry for each memory cell. This step may involve making multiple copies of shared circuits but there should be a definitive circuit for each memory cell to define what effect, if any, that the inputs have on the transition to that state, what output(s) are generated by that state and how the inputs may affect those outputs, and also define which state or states it might transition to next with the inputs controlling which state will come next if more than one is possible. The example above is very simple, each state transitions to the next state except the last one which loops back on itself until a reset comes in and then state 1 is active again. On the outputs each state generates a single, unique output and only one, state 3, if affected by the input values.

To further understand finite state machines, read the examples below where the sequence of states is not always as sequential and where the inputs have a greater effect on state transitions. It should also be possible to reverse this process and take a finite state machine and move all the states back into memory cells in the memory block and move all the logic back into one block. In cases like the one above, the transition from one state to the next is just a line going from the active signal of one memory cell to the set/activation of the next. If the sequential circuit was clock driven, an external clock would be one of the inputs and the logic block would control where it went. If the clock was asynchronous from the inputs then a local clock would be part of the logic block. It is possible to mix in some analog signals that may be controlled or conditioned by the various state outputs and may affect the logic block by using comparators, threshold detection, peak detection or other digital signals derived from analog inputs. For instance, an analog signal can either be very small but must be read with precision or can become quite large, so have it go through a digital AGC where the region of input from the last clock cycle determines whether the current signal is amplified or damped down.

A Finite State Machine is a way of keeping track of some prior history while strictly limiting the detail of the 'memory' of the system. This contrasts with an infinite state machine like an analog audio filter. The filter is affected not just by the current voltage coming in but also by the charge on it's capacitor(s) and current through it's inductor(s), which are the integral of all the voltages that have come through before. It would take an infinite number of states to use state number to store that same information. The finite state machine requires that the history of how it got to that state be unimportant, only what being in that specific state implies and that it respond to the next input based solely on which state it currently is in.

For example, a vending machine waiting for the next coin or a compiler tokenizer knowing how to respond to the next character depending on whether it is in the state of reading a number or a variable name. For a simple sequential circuit that would mean the circuit stage 1 performs its task and then turns processing over to stage 2 which runs till finished and hands off to stage three and so on. If there is no switching, jumping around some stages, holding at some stage until an external trigger allows it to continue, the finite state machine view is very simplistic with all the states leading only to the next stage like beads on a string. The finite state machine view of a sequential circuit is more useful if the timing or sequence of events is affected by outside values or triggers. To more fully understand a finite state machine, consider the examples below.

Consider a vending machine. For this example we will consider an older machine that takes nickels, dimes, and quarters only and dispenses any selection for 50 cents. The finite state machine would have a state for 0 cents, 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 65, 70, return 20, return 15, return 10, return 5, and vend. If you approach the machine when it is in the initial state of 0 cents then put in a nickel, it would go to 5 cents state, a dime would send it to 15 cents state, another dime to the 25 cents state. In each state the state itself keeps track of the money entered so far. The 25 cents state does not know if it was a nickle-dime-dime or a dime-nickle-dime or a nickle-nickle-nickle-dime or a quarter. The path that led to this state is unimportant, it only matters what credit has already been built up and if a new coin is inserted or the return change button pressed. All the states at or above 50 cents watch for a selection button to be pushed or the return change button and they lock out accepting any additional coins. But since it is possible to put in a quarter at the 45 cents state the machine has to allow for excess credit and to have states to control paying back the excess as well as actually controlling the vending process. Once the excess credit has been paid off and the vending process completes, it returns to the initial state of zero cents.

This example would be much more easily done today with a single microcontroller, but for the original vending machines which existed long before microcontrollers, it allowed simple relays to store the state and simple switch inputs to determine which state to go to next, and each state would have its own outs. In this case the outputs of each stage would drive different elements of LEDs, LCD, or other display device.

This limited memory approach lends itself to more modern problems as well. For instance a software compiler program would normally have a tokenizer to initially break up the input text into different syntax types, like variables, numbers, operators, or white space before passing the tokens on to the syntax layer. Below is a graphic of a simplified tokenizer. It looks very complicated but is actually very simple in operation. It is considerably simpler than trying to merge the text input routines with the syntax parts of the compiler which would require lots of if-then-else blocks and special cases and jumps from one section of code to another. Interestingly enough, the syntax portion of a compiler also works well as a finite state machine, but that is a question for a programming site.

7 State tokenizer

There are many different ways here to enter the initial state (1) so it can 'know' only that it is the beginning of a new syntax type whether that be the first character in the file or a number in the middle of an expression. It is because it responds the same to the next input regardless of what came before that a finite state machine works well here.

Assuming the state machine is currently in state 1, if the current character is a white space go to state 2 where it loops on more white space and then returns to the initial state 1. If it starts with a digit then it is a number, go to state 3 to process it as an integer, if the character is a letter than it goes to state 4 and is a variable name which can also contain digits as well as letters. This state machine is designed to require variable names to start with a letter and then be free to use letters and/or numbers. If the first character is a math or logic operator then it goes to state 5 and collects all the characters in that operator.

Notice that in state 1 a digit and a letter are treated differently. After the first character has been processed, the next character could be a digit which could be part of a number or part of a variable name. The state the machine is in when it receives that digit determines if it will be treated as a number or a name. This is the power of a finite state machine, that you don't have to scan back through some or all of the prior input to know whether the current character is part of a number or part of a name. If the integer collecting state 3 finds a period instead of a digit it goes on to state 6 to begin doing a fixed point or floating point number.

Notice here that the states do not have to go in sequential order. In fact when there are several possible destination states from the current state based on the current input, it is not possible to get them all in order, and the numbering scheme is quite arbitrary. If the period is not followed by another digit, it assumes that the number is the floating point equivalent of the integer and returns to the initial state. If more digits, then go to state 7 to build the rest of the fixed point number. For simplicity sake, true floating point numbers and other program elements were not included in this example.

A finite state machine will likely be a good choice if your job can be broken up into a modest number of independent tasks, each task handles the next input the same way regardless of what happened before (duplicating some tasks with slight changes to remove history dependence is ok) and the decision of which task to go to next is clearly defined for each task. If some tasks work more interactively with others, or large amounts of prior input information is needed, then finite state machines will probably not work well.

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  • \$\begingroup\$ Good example of many types of states, including decision loops. If you use quoted or copyrighted material you need to state your source and provide a link. If it is self-created then no problem. \$\endgroup\$
    – user105652
    Commented Jul 8, 2020 at 23:32
  • \$\begingroup\$ Note that in programming a new character is scanned for its ascii number value, which tends to be in groups. Case switches scan for a group match, then downstream code takes over to ID words, numbers, commands, etc. \$\endgroup\$
    – user105652
    Commented Jul 9, 2020 at 2:52
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    \$\begingroup\$ All graphics and text was created by me. No copyrighted material has been copied for this answer. Yes case blocks based on ascii values can separate incoming text but as the example of digits above demonstrated, the meaning of a single character can change based on what preceded it just a few characters before. The down stream code would still need to be a finite state machine or something very close or need to scan back to determine how to treat some characters. \$\endgroup\$ Commented Jul 9, 2020 at 8:36
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    \$\begingroup\$ +1 This is a superb answer and worth more notice than it has received \$\endgroup\$
    – Russell McMahon
    Commented Jul 2, 2023 at 12:34
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Having no memory, a simple logic circuit determines its outputs from only the latest inputs. With memory to store something about past inputs, sequential circuits can process new inputs in a historical context.

A simplistic way to do this would be to store past inputs and use logic that accounts for all history. This has some obvious limitations. Another way would be to create an algebraic (state space) representation, using Difference Equations; for many applications, this is too complex and abstract.

Finite State Machines use a structured memory - called the state - to track the circuit's history using explicit decisions. New inputs - or Events - are combined with the current state to determine the next state as well as the circuit outputs.

By defining the outputs of each state along with the state transitions, an FSM design process starts to resemble programming. In fact, the heart of any microprocessor is a state machine that uses machine code as input. Conversely, software sometimes uses the FSM model to create well-defined code for high reliability.

Below are two different FSM examples to detect the sequence "Hi!" from a keypad. The blue transitions show progress through the sequence; otherwise, the sequence is broken and the machine resets.

enter image description here

These demonstrate the two types of FSM: a Mealy machine on the left and a Moore machine on the right. With the Mealy type, you can see that outputs are defined with state transitions; the Mealy output logic uses both the current state and the input, which makes them very responsive. Moore machines determine the output based solely on the current state, so outputs on the diagram are defined within the states; this arrangement makes Moore outputs very stable.

Mealy outputs respond immediately to inputs, and they tend to also have fewer states - which translates to less memory. The input above, though, is a keypad which may not be very stable; since the input determines the output, this means that the output will have the same problem. With three states, the Mealy machine will require 2 bits of memory. To stabilize the output, adding another (latch) bit may be necessary.

Moore machines tend to add states to help track outputs; above you can see that the top Mealy state is split into two Moore states - one for each output condition. With four states, the stable Moore output is provided using only 2 total memory bits.

Logic complexity is another interesting aspect of these machines. In the above comparison, the transitions are virtually identical; the transition logic should be similarly matched. However, note the number of output designations: Mealy outputs are shown for seven transitions, while Moore outputs only account for four states.

These trade-offs will vary from one application to the next, but some patterns will generalize. Mealy outputs are more responsive, while Moore outputs are more stable. Mealy machines tend to take fewer states, but output logic is often simpler in Moore machines.

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  • \$\begingroup\$ Any feedback you can provide would be appreciated. Thanks! \$\endgroup\$
    – mbedded
    Commented Jul 13, 2020 at 17:55
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    \$\begingroup\$ If people are wondering why the two different types, consider the following from even this example. The Mealy machine has 1 fewer states, which for a more complex machine could make a big difference. But the output is based on both the current state and the input value. If the input value is not stable between state changes (clock pulses) the output could flicker on and off. The Moore machine uses one additional state, but the output is only a function of the current state and so will be stable between state changes. \$\endgroup\$ Commented Jul 14, 2020 at 7:08

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