# Problem with closing high side P mosfet using B type amplifier

I am using this high side P mosfet dirving circuity:

My problem is the main P mosfet doesn´t deactivate entirely. More specificly its gate is at 8,4V (with 15V vbat voltage it makes 6,6V gate - source diference => mosfet is activated [it shouldnt be in this state when Q1 is deactivate]. When I activate Q1, P mosfet is activated too and everything seems working. Also I find out that complementary BJT´s gate is also at 8,7V.

My first suspicion was D1 (zener diode), but when I removed it, nothing changed.

Next I tried pull main P mosfet´s gate dircetly to VBAT to try if it isnt damaged. When I done that the mosfet deactivate => so mosfet is working.

I also tried to remove complementary BJTs to see if there isnt anything else pulling its gate to 8,7V, but after its removal complementary BJTs gate rised to VBAT, so there isnt anything else pulling it down.

I also tried to use higher VBAT voltage, but gate was still on something about 8V.

Do you have any idea whats forcing the complement BJTs to stay at 8V and therefore not deactivating the main P MOSFET?

• Apparently you are using the same BJT for both PNP and NPN devices - look at the part number on the schematic. When you say the MOSFET closed - EE's take this as meaning that the MOSFET activated i.e. the circuit closed and current flowed. Please don't use plumbing jargon when talking about electrical circuits. To save confusion say activate or deactivate. – Andy aka Jul 5 at 8:32
• Sorry for confusion, I ll fix that. They has the same part number because, they are in one package. – LucasN Jul 5 at 8:53
• It is a long shot, but did you try removing the FET $Q_1$ in order to check whether it works. In case it works, it could be that the leakage current of $Q_1$ is slightly turning on the lower BJT. – vtolentino Jul 5 at 9:50
• I am tried it now, but anything changed. I also tried to remove the main P mosfet and on the pin where should be its gate its still 8V. – LucasN Jul 5 at 9:55
• The problem seems to be with the way you connected the BJT pair. I will explain in an answer to make it clearer. – vtolentino Jul 5 at 10:44

The problem seems to lay with the negative feedback the gate of the MOSFET is generating when it is being turned off.

During the ON phase, everything works as expected.

Operation: The FET $$\Q_1\$$ is turned on, then the PNP is turned on, and the gate of the PFET is pulled to ground.

During the OFF phase, the PFET is not fully turned off.

Operation: The FET $$\Q_1\$$ is turned off, then the NPN is turned on. The gate of the PFET starts to be charged and consequently its voltage increases. As its voltage increases it generates a negative feedback, thus the voltage across the base resistor $$\R_1\$$ starts to reduce and so does the biasing current. This in turn, lets less current to flow to the gate of the PFET through the NPN transistor. Basically you are creating a voltage regulator.

How to fix it

You could flip the BJTs and operate then in a push-pull way, by connecting them both in a common emitter configuration, like the following:

The slew rate of the gate charge can be optimized by changing resistors $$\R_1\$$ and $$\R_4\$$.

• That's interesting theory, but I just find out that was error in the footprint of the complement BJTs. It was stupid mistake. But thanks for your answer it was inetering thought. – LucasN Jul 5 at 14:50
• Please note your circuit seems to generate a short circuit when M1 is off. – carloc Jul 5 at 15:27

I found out mistake in complementary BJTs footprint. Now everythings works fine.

The pnp transistor of the complementary pair had switched collector and emitor.

But thanks everyone.