Board : KC705 Vivado :2017.3 Project: Connect board via the ethernet port and output the data via SFP+ module. No data manipulation or filtration needed. Just take packets and send them. Data rate of ethernet and SFP+ will be 1Gb/s itself.
Here's the design I've made on the Vivado IP integrator tool:
I've used TEMAC and PCS/PMA cores in the design. Although for the MAC to PHY I should have choose GMII interface, but somehow I can't connect it the onbard PHY so I had to change it to MII and then it got connected. However, I'm stuck. Can someone please help me validate the design. I also want to know how would you instantiate the MAC configuration via AXI ethernet MAC lite block or some other non processor block.
Also, I'm getting some address overlap error. Please refer to this link for the address error: https://forums.xilinx.com/t5/Memory-Interfaces-and-NoC/Ethernet-AXI-interconnect-Address-editor-Overlap-issue/m-p/1126306