# Can I use ANDs as Tri State Buffers?

I’m working on a 4 bit computer/calculator that’s fully NAND (just for the heck of it) and I needed some tri-state buffers for the registers. I think that using an AND works the same, but nowhere online shows a layout like this for a tri state buffer.

Is there a reason we don’t use these, or are they everywhere?

No you can't:

This is a tri-state truth table (this one also inverts, also the EN is B in the diagram):

Source:http://karmic23.blogspot.com/2011/01/cmos-inverting-tri-state-buffer.html

An 'AND' gate only output's high and low's

A tri-state will float when the output is in High-Z, this means you can connect two or more to the same wire and if they are in High-Z mode, it won't interfere with the other outputs of other tri-state buffers, which makes them useful for constructing busses. If you connect the outputs of two and gates together, your likely to get a over current condition when one goes high and the other low.

In short: Tri-state buffers are for 'buffering' the outputs can be connected (though two should not be enabled at the same time). 'AND' gates outputs should not be connected.

That truth table for the tri state isn’t Quite correct, when enable is low the output of the tristate is actually “high impedance” - it looks as if it’s not connected at all.

• So if I'm correct, when enable is either low or the gate is turned off (depending on the buffer) the truth table should have a Z for high impedance? Jul 9, 2020 at 21:00
• When enable is low only the tri state buffer will be “z” or “hi-z”, whereas the AND gate will output a real zero. Tri states are usually used with their outputs in parallel with other outputs, and the enable lines are sequenced in such a way that the outputs never are in conflict. The AND gate has no such feature - if you were to parallel it with another logic output there could be conflicts, leading to undefined voltage levels. Jul 9, 2020 at 21:06