I'm building a frequency synthesized local oscillator with coarse and fine tuning to span 30.5 to 32MHz. The design follows the following block diagram (bits not essential to this question removed for clarity):
Coarse tuning is done through the ADF4002 phase locked loop (PLL) IC in 5KHz steps. For fine tuning, I'm using an AD9851 DDS module. The DDS signal is mixed (NE612) with the VFO to produce a 25MHz IF, which is filtered through a BPF (3rd order Cheby) centered on 25.25MHz. The PLL will divide the 25MHz signal and lock to the 5KHz reference signal (derived from a 20MHz crystal by the PLL.)
I elected to use the Analog Devices ADISim tool to choose the component values for the LPF and I opted for a 4-pole active design where the target frequency was 30.5 to 32MHz. I chose the fast settling time option and the tool returned the following circuit:
Unfortunately, I'm having a problem where the PLL won't lock. I can get it to lock (but with an extremely jittery output) if I apply a voltage to the VCO input that puts the VCO somewhere in the 30.5MHz zone. When I remove this voltage, the PLL will remain locked providing it's coarse setting is tuned to the upper part of its range. If I lower the range setting, it unlocks (and the jitter stops.)
Now here's the thing, in a previous incarnation of this circuit I had the coarse tuning part working driving a VFO from 34.5 to 36MHz. I had used the exact same low pass filter design but with different component values (as dictated by ADISim for that particular target frequency range.) So, I know there's no issue with my PLL board. I've tested the 25MHz band pass filter independently and its bandwidth is wide enough to cover the frequencies of interest.
I think the issue is with the PLL LPF and here's my question:
Should I have asked ADISim to design the filter based on a target frequency of 24.5 - 26MHz rather than the VCO frequency of 30.5 to 32MHz?
In other words, where a mixer down-converts the VCO frequency in the loop, what loop frequency are you really working at?
If you need any more detail I'm happy to post it up. This is a complicated circuit, so I've left out bits that I suspect are working fine.