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I am working to create a controller for a Micron NOR Flash Memory (MT25QL128ABB) and I am having difficulty writing/reading the device. I would like to know if my procedure is correct:

Write Procedure:

  1. Send the write enable command (06h)

  2. Latch the write enable command in by raising the #S line

  3. Lower the #S line

  4. Send the page program command (02h)

  5. Send the write address (24 bits)

  6. Send the write data (I am writing 96 bits)

  7. After the last bit of the write data has been sent, raise the #S line

Read Procedure:

  1. Lower the #S line

  2. Send the read command (03h)

  3. Send the read address (24 bits)

  4. Continue sending clock signal for 96 bits

  5. After the last clock has been sent, raise the #S line

The datasheet is as follows:

For a read:

enter image description here

For a write (page program):

enter image description here

After I attempt a write, I read the status register and I see that the "write enable" bit is still set. The datasheet indicates that the write enable latch should be cleared automatically after a page program command whether or not it was successful. This indicates to me that the page program command is not being executed.

When I attempt a read, I would expect since I haven't successfully programmed the memory I would get all 1's. The device does indeed return all 1's on a read however it continues to output for a set amount of time even after I have stopped the clock and raised the #S line.

Note that I am able to successfully read the status register, flag status register, device ID, set the write enable latch, and clear the write enable latch at will. Before attempting a page program command I always send the bulk erase command to ensure the device is erased. I am running the CLK to the memory device at 20 MHz, well below the max. frequency.

Here is the timing diagram of what I see when I try a read:

(not to scale)

enter image description here

Here is what I send for a write:

(not to scale)

write diagram

Note that these diagrams do not show the actual number of clocks

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Flash takes time to write, on the order of milliseconds. After you send the program page command, what do you get when your read the write in progress status? The data sheet also says the write enable resets if the operation times out, suggesting while write is in progress, the write enable latch is still set.

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  • \$\begingroup\$ I am manually sending these commands using a C program to trigger an FPGA to send the command so I do not believe it's an issue of time since I am attempting a read seconds later. Even so, I am reading the status register after attempting to write and the status bit is 0 indicating the device is ready. I also read the flag status register and all bits are 0 except bit 7 which indicates that no command cycles are in progress and the device is ready. \$\endgroup\$ – David Jul 15 '20 at 17:38
  • \$\begingroup\$ In that case, I would try probing the lines to the chip and looking at what it actually received. \$\endgroup\$ – Joneleth Irenicus Jul 15 '20 at 17:47
  • \$\begingroup\$ I've done that. It's defiantly receiving exactly what I intend to send to it. I have verified that I am not violating timing requirements as well. I am going to create a timing diagram and add it to my question to clarify what I am seeing. \$\endgroup\$ – David Jul 15 '20 at 19:00
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I discovered the issue with my setup. The problem was that I was not giving the memory device enough time to latch the write enable command before I was sending the page program command. I added a larger delay between sending the write enable command and sending the page program command which resolved the issue. I am now able to successfully read and write data to the device.

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