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My goal is to implement logic function F = XY + ZW. In previous board, It was constructed by using three NAND gates as brought in below photo. Yet, by employing NOR gates, I have to make use of eight gates. Is there any design employing less NOR gates?

enter image description here

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    \$\begingroup\$ Not when you need to use them as inverters. If XYZW were inverted, then this nor option would make sense. \$\endgroup\$
    – user105652
    Jul 19, 2020 at 8:27
  • \$\begingroup\$ There are 4 input nor and nand gates, but that would make it too easy. \$\endgroup\$
    – user105652
    Jul 19, 2020 at 8:29

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If it were to be implemented using NOR gates only, eight is the minimum number while it is just three in case of NAND gates.

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    \$\begingroup\$ Can you explain to the OP why that is the case or how you proved it? \$\endgroup\$
    – Transistor
    Jul 20, 2020 at 8:25
  • \$\begingroup\$ I worked it out and arrived at the similar number of NOR gates. It comes to 8. \$\endgroup\$
    – Kaswechiha
    Jul 21, 2020 at 7:10
  • \$\begingroup\$ That's what you said already in your answer but it's not a proof. (I don't know how to prove it either.) \$\endgroup\$
    – Transistor
    Jul 21, 2020 at 7:15

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