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Imagine I have a design idea for a ground-breaking cpu design. However, I don’t have millions in research money.
My budget: $0.25
As a result, manufacturing trial and error is not an option, especially if I was looking for a < 40nm process.
Are there any tools out there that I could use to simulate a design using logic gates and pre-build combinations thereof? With the sheer number of components I would likely need, regular old circuit simulation is not ideal.
Everybody uses simulators for this purpose.
Two that are freely available and widely used are Modelsim (free version may have limited functionality), and Verilator (completely free, can be faster, but less functionality).
Logisim is a free, open source digital logic simulator. It is commonly used in education, and can quite easily be used to design and simulate simple CPUs. For more complex CPUs, hardware description languages (Eg verilog or VHDL) are more commonly used than the schematic based approach of logisim. Open source simulators for these are also availabke (Eg Icarus Verilog) .
Use a free vendor FPGA development IDE package.
E.g. Lattice Diamond, which comes with a free cut down version of the very excellent ActiveHDL VHDL & Verilog simulator.
If you write your Verilog or VHDL code using generic logic and avoid vendor macros you don't get tied to a specific vendor.
If you have to use vendor macros write wrappers for them so that you can plug in a different vendor later.
Vendor tool chains typically include tools to automatically generate generic and technology specific schematics.
