So, I'm working on a design for a device that is to be powered both from the AC line (using a power supply module, for now at least), and a non-rechargeable battery pack (6 alkaline AA cells). The device has a rather low (easily submilliamp) standby current, but when fully activated, draws nearly 2A peak, irrespective of whether it is on AC or battery power. As a result, the typical approach of using a diode in series with the battery practically requires a Schottky to be used, and even then, losses are relatively high, on the order of 400mV for a 1N5821.

This is problematic due to the low battery threshold of the device overall being relatively high, so a 400mV drop atop that means that the low battery detection could be set off falsely. Furthermore, using a relay for switching between AC and battery is unattractive for reasons that have to do with both the size of the relay and the amount of control logic hackery that would be needed to provide for low battery monitoring in that case. Finally, the classical P-FET reverse battery protection circuit seems like it would not work correctly with 9V imposed on the source from an external power supply, nor will a switched power jack work due to the AC supply being a hardwired unit in this case.

Is there a better low-cost/low-parts-count solution to this problem out there than burning power in a diode or deal with the infelicities of controlling a relay? A full power management train is very unattractive for this application due to the simplicity of the rest of the circuitry, and while an individual ideal diode IC could be used, they tend to be relatively expensive and featureful parts that do far more than is needed in this application. (They're also small and thus relatively difficult to prototype with, but that's neither here nor there at the moment.)

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    \$\begingroup\$ I presume the switched power jack socket trick is too obvious? \$\endgroup\$
    – Transistor
    Jul 25, 2020 at 22:10
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    \$\begingroup\$ You use a PFET with a PNP pair. electronics.stackexchange.com/questions/223935/… \$\endgroup\$
    – DKNguyen
    Jul 25, 2020 at 22:22
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    \$\begingroup\$ "the classical P-FET reverse battery protection circuit seems like it would not work correctly with 9V imposed on the source from an external power supply" - why not? \$\endgroup\$ Jul 25, 2020 at 22:45
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    \$\begingroup\$ @BruceAbbott because the FET would have 9V on the source with respect to the gate, turning it ON and rendering its presence moot \$\endgroup\$ Jul 25, 2020 at 22:47
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    \$\begingroup\$ You want 'as much as possible' of the 9V, but also a 'better low-cost/low-parts-count solution' and you don't want to use an ideal diode IC because they are 'difficult to prototype'. Some compromise may be in order. \$\endgroup\$ Jul 25, 2020 at 23:01

1 Answer 1


As well as wanting very low voltage drop in battery backup mode, in the comments you say

the mains supply's output is 9V nominal, and I want to have as much of that available as possible

The obvious solution is to combine the power sources through 2 'ideal diodes' which have very low voltage drop. If a dedicated IC is not acceptable then you could use discrete transistors instead. The circuit is similar to the one shown here, but with higher value resistors to reduce quiescent current draw.


simulate this circuit – Schematic created using CircuitLab

R1 (R3) is made a lower value than R2 (R4) to make the Base-Emitter voltage of Q1 (Q4) slightly greater than Q2 (Q3), causing Q2 to turn on and keep the FET turned off until the 'ideal diode' drops a small 'forward' voltage. To ensure that this works reliably the transistors should be thermally coupled and well matched.

For a one-off circuit you could use unmatched transistors, but test the circuit with a small load current and swap them around to get the highest 'forward' voltage drop across the FET. This should ensure that it turns off promptly with negative bias, though in your application it may not be critical.

  • \$\begingroup\$ BTW: I got a "blip" of reverse current into the battery at startup in my LTspice sim of this circuit with R1=R2=750k, is that a sign there's an upper bound on the resistance values used in this circuit? \$\endgroup\$ Jul 26, 2020 at 14:20
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    \$\begingroup\$ The higher the resistance of R2 the slower the FET turns on, due to Gate capacitance. Normally Q2 turns on quickly as it amplifies current supplied by R1, so the FET turns off quickly (before the other one turns on), but with very high R1 value Q2 also takes longer to discharge the Gate so the FET turns off slowly, causing a blip of reverse current when both FETs are on together. Assuming the power isn't switched very often this short blip shouldn't be a problem. Leakage through the FET may put more charge into the battery in the long term. \$\endgroup\$ Jul 26, 2020 at 21:27
  • \$\begingroup\$ I did some more simulation work in LTspice and found out one caveat about this circuit -- if BAT1 is connected backwards with the 9V rail powered up, then Q1's B-E junction gets hit with oh, 18V of reverse bias = bye bye Q1 \$\endgroup\$ Feb 16 at 5:00
  • \$\begingroup\$ So don't do that. Connecting a battery with reverse polarity is fatal to most electronic devices. If you can't avoid that possibility then a resistor between Q1 and Q2 Base (eg. 10k) would limit reverse b-e current to a safe level. \$\endgroup\$ Feb 17 at 20:50
  • \$\begingroup\$ Yeah, while you and I can be counted on to not hose things up, end users aren't so reliable :P (and some product standards call for testing the product vs. reverse battery conditions). I'll keep the resistor in mind if whacking 1N4148s in series with the emitters of Q1 and Q2 doesn't do the trick \$\endgroup\$ Feb 17 at 22:58

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