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I came across this Animation and have no idea why the output is shaped like this. Apperantly the capacitor is charging and discharging but I cannot tell when this happens. All I know is that capacitors do not like the voltage across them to change and resist it.

Can you help me understand and comprehend this animation as I am terrible at guessing capacitor behaviour.

enter image description here

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You were looking at node voltages not the difference which is Vcap.

Try again. CdV/dt=Ic

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  • \$\begingroup\$ so I understand that if I find Vcap which is Vout - Vin, I can find Vout. However, How can I find Vcap and which direction does the current goes through the capacitor and when it charges up and discharges and the output voltage is 5V without adding capacitor effect is that why current direction is probably from Vout to Vin. Many questions pls help \$\endgroup\$
    – EEstudent
    Jul 26 '20 at 1:29
  • \$\begingroup\$ Try again here I slowed down the clock and shows 4 signals. When you point to each, the turquoise colour points to what is being captured. See if you can figure out what Ic=CdV/dt means here with the different voltages across each component all adding up to the square wave source. A positive slope voltage produces a positive current glitch in the cap. But you can invert the waveform by selecting the Cap then "Swap terminals" to challenge your learning process. tinyurl.com/y4752ou8 \$\endgroup\$ Jul 26 '20 at 10:45
  • \$\begingroup\$ or here tinyurl.com/yy7u559n adjust simulation speed, Resistance , capacitance then stop the scrolling ( no trigger sync) \$\endgroup\$ Jul 26 '20 at 10:59
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As current flows through a capacitor, it charges up and develops a voltage across it. This voltage takes up some of the voltage drop from the source that is available to the rest of the circuit.

That's why you have that negative slope. As the cap develops a voltage, less voltage is available to power the other components in your circuit.

If the cap ever manages to charge up to match the source voltage, then zero volts is available to the rest of the circuit and no current can flow but this circuit is changing too often, too quickly for the capacitor ever reach that point.

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The capacitor combined with the resistors forms a high pass filter, in that only the rising and falling edges can pass through un-distorted. The flat top and bottom cannot be maintained, so they drop off in amplitude until the next rising/falling edge. (Called droop effect)

The pulse width and time-constant of the RC values are just enough to create what you see. If the value of C is lower the droop effect is more pronounced until you have mostly just rising and falling edges.

If the value of C is MUCH higher then the waveform would pass through with no droop effect, assuming the pulse rate and width does not change.

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