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I've been building my own CPU from low level chips, using the 74LS283 adder. And I've been wondering about how to set the overflow flag. Finally I seem to have grasped that the overflow flag is the carry-in of the MSB xor-ed with carry-out of the MSB. See also https://stackoverflow.com/questions/29330787/signed-overflow-why-carry-in-and-carry-out-of-msb-should-match. But I wonder how I could even know the carry-in of the MSB when I use the 74LS283 adders?

I suppose with the '181 ALU, there are signals !P and !G. From the datasheet:

P (Carry Propagate) and G (Carry Generate). In the ADD mode, P indicates that F (result) is 15 or more, while G indicates that F is 16 or more. In the SUBTRACT mode, P indicates that F is zero or less, while G indicates that F is less than zero. P and G are not affected by carry in.

this sounds like it might come close, but if I interpret the 4-bit numbers as two's-complement signed numbers, then 15 is already -1. In subtract mode this might work. But what about signed addition overflow?

There is another related question here: How to determine if a Carry Look Ahead Adder Overflows but it seems to have only allusions and comments that speak about precisely the problem that the carry-in to the MSB is hidden inside the package.

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You don't need to see the carry in, you just need to see the result. If the carry out and the MSB of the result (i.e., its sign) are the same, there was no overflow. If they are different, there was an overflow.

EDIT:

Note that if the signs of the input operands are different, it is impossible to have an overflow. So the complete solution is

$$ Overflow = \overline{(A_{MSB} \oplus B_{MSB})}\cdot(SUM_{MSB} \oplus C_{OUT})$$

You can also think of it as a parity operation on the above four bits. If 0, 2 or 4 of them are set, there was no overflow. If 1 or 3 of them are set, overflow.

$$ Overflow = A_{MSB} \oplus B_{MSB} \oplus SUM_{MSB} \oplus C_{OUT}$$

Note that these two equations are not exactly equivalent, but because of how the adder works, the differences are all "don't cares".

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    \$\begingroup\$ This answer doesn't work. Take two simple cases: -5 + 3 = -2 and -3 + 5 = 2. They must not generate any overflow. \$\endgroup\$ Jan 21 at 8:11
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    \$\begingroup\$ @MykhayloKopytonenko: You're right. But it's impossible to have an overflow if the signs of the input operands are different. I've added that test to my solution. \$\endgroup\$
    – Dave Tweed
    Jan 21 at 12:57

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