Reverse polarity protection using back to back NMOS

Question

Designing a circuit to measure short circuit current of a power supply every second. Measurement will be on for about 50ms every second. Heat design has been made for this about of time not constant current flow. Current can be up to 15A and the voltage up to 60V when in voltage source.

Want to provide reverse current protection in case the user connects polarity wrong so the components don't overheat. If this occurs I have tested the board and it goes over 180º. In normal mode no component goes over 45º.

Have designed following circuit but it does not work. Works fine in forward mode. In reverse polarity mode once I switch ON both MOSFETs and its fine but I cannot switch them back off even if the gate is set to GND and heat rises drastically.

Any thoughts what could be wrong?

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Built new circuit but it's failing when V1 is higher than 50V.

Answer 1

This is more or less what I have in mind. When I use back-to-back FET's I almost always start by pulling the gates to the sources with a resistor. This is a foolproof way to make sure they will be off in normal operation. Then I go from there.

In this case, D1 is needed to make sure that during reverse polarity connection no current flows through the body diode of M2 into the control circuitry I assume is connected to G. If that were to happen, the MOSFET's could be damaged as well as anything connected to G.

In addition to what I have shown, you may want Zener protection in parallel with R1 to make sure Vgs never gets high enough to damage M1 and M2.

Note that if and when M1 and M2 fail, you will have a short circuit across the power rail. So you should give some thought to the consequences of that to make sure they are acceptable. It is a foreseeable failure, not a one in a million freak occurrence. So the consequences need to be acceptable, or if not, you may need to add a fuse or some form of detection, etc.

^{simulate this circuit – Schematic created using CircuitLab}

Answer 2

Built new circuit but its failing when V1 is higher than 50V

It should be be failing well below 50 V. Your circuit does not provide reverse polarity protection.

Ground should be applied to the MOSFET Source terminals, so that V2 is directly connected between the Gate and Source of each FET. The circuit looks like this:-

^{simulate this circuit – Schematic created using CircuitLab}

(R1 is provided to ensure that the FETs stay turned off if V2 is disconnected)

The FETs should be rated for at least the maximum expected voltage (including spikes caused by wiring inductance etc.) preferably 20% higher to give a safety margin. Most FETs rated higher than 60 V are 'standard' Gate drive, which requires 10 V to turn on fully.