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All opamps are ideal. The question is to find the input impedance Zin(s).

Using KCL:

$$I = (V_i-V_{o2})/R_1 $$ $$V_i/R_4 = I-[(V_i-V_{o2})/R1 + (V_i-V_{o2})/R_2] -[(V_i-V_{o1})/R_3+(V_i-V_{o1})sC]$$

Where Vi is the input voltage, Vo1 and Vo2 are the output voltages of the first and second opamp from the left respectively. But this method wouldn't work since we don't know the output voltages of the opamps since they are ideal.

Please help me with the proper method to find the impedance.

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  • \$\begingroup\$ I’m voting to close this question because homework needs an attempt at a solution, provide the solution and reopen your question \$\endgroup\$ – Voltage Spike Jul 29 '20 at 15:19
  • \$\begingroup\$ Um yes, I did attempt using KCL as I mentioned in the question, but I found out that it didn't work because of the fact that the output currents in the opamps can be any value due to them being ideal. \$\endgroup\$ – SacredMechanic Jul 29 '20 at 16:53
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    \$\begingroup\$ As per the guidelines on writing questions of the site, you need to show that attempt, the website supports latex equations \$\endgroup\$ – Voltage Spike Jul 29 '20 at 17:00
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    \$\begingroup\$ When you attempted KCL, what did you replace the op amps with ? Alternately, if you can demonstrate that the opamps are operating in linear regime, then apply virtual ground concept. I think the number of unknown node voltages will drop dramatically (from 5(?) to 1 or 2). \$\endgroup\$ – AJN Jul 29 '20 at 17:13
  • \$\begingroup\$ Junctions : R1-R2, R3-C, R4-C. You have written only 2 current equations in the question. There should be three. Can you label the nodes and voltages and current directions. It will make it easier to find any mistakes. \$\endgroup\$ – AJN Jul 29 '20 at 17:27
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Cool circuit.

enter image description here

The impedance looking into the circuit is V1 divided by the current that flows into R1 (because no current flows into the opamp input).

If V2 was ground, or a virtual ground, or an AC-ground (as it is in this case), then you’d think impedance would just be R1. But in this case V2 is a function of V1 so it’s not so simple. For example, if the math worked out such that V2 = V1 then no current would flow through R1 at all. If V2 = 0.999V1 then very little current would flow, making R1 appear much bigger than it is.

So we need to solve for V2 in terms of V1.

The first thing to realize is that, assuming the circuit is stable, the voltages at all opamp inputs will be that same, V1.

You can get two node equations, at node A and B.

The node A equation will have V1, V2, and V3 in it. The node B equation will have V1 and V3.

Solve each for V3 (which you don’t care about) and combine. Now you have one equation with V1 and V2.

Solve V2 in terms of V1. It will be V2 = [some big mess involving R2, R3, R4, s, C] * V1

Let’s call that mess K: V2 = KV1

Now you have V1 looking into R1 connected to V2 = KV1

enter image description here

The input impedance is input voltage / input current = V1 / ((V1 – KV1)/R1) = R1 / (1-K)

If you post your answer I’ll let you know if it matches mine!

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  • \$\begingroup\$ Your method worked flawlessly! The answer I got was Zin(s) = sCR1R3R4/R2, which I think is the correct answer. \$\endgroup\$ – SacredMechanic Jul 30 '20 at 12:05
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    \$\begingroup\$ Hey! I got the same answer. Excellent. \$\endgroup\$ – td127 Jul 31 '20 at 2:28
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These generalized impedance converters (GIC) are always intimidating because of the weird op-amp arrangement. I have used the fast analytical circuits techniques or FACTs to solve this circuit: determine the time constants in two different conditions (zeroed excitation and nulled response). With one single capacitor, this is a 1st-order circuit. To determine the input impedance, I will install a test generator \$I_T\$ across the input node which will generate a test voltage \$V_T\$. The ratio of \$\frac{V_T}{I_T}\$ is the input impedance we want.

The key in solving these circuits is to rearrange the elements in a friendly form where writing equations is more obvious than with the original schematic diagram. The dc resistance is obtained for \$s=0\$ in which the capacitor is open-circuited:

enter image description here

I prefer to keep the open-loop gain of the op-amp which is pushed to infinity later on. SPICE determines the bias points and both are equal (original circuit and simplified version). The dc resistance is determined after a few equations:

enter image description here

It obviously goes to zero as \$A_{OL}\$ approaches infinity. Mathcad find 0.02 ohm, in line with the SPICE operating point.

Now, we turn the excitation off - \$I_T = 0\$ - and open circuit the stimulus. The exercise now consist in finding the resistance \$R\$ offered by the capacitor connecting terminals. The new circuit is here:

enter image description here

A test current source is installed across the capacitor connecting terminals and the resistance is a few equations away:

enter image description here

As you can see, provided the open-loop gain is high enough, the pole is located at a very high frequency and can thus be neglected.

For the zero, we find the resistance \$R\$ when the response \$V_T\$ is nulled. A nulled current source is a degenerate case and can be replaced by a short circuit. The new circuit is shown below:

enter image description here

The zero is obtained after a few equations:

enter image description here

We now have all the pieces to assemble the transfer function:

\$Z_{in}(s)=R_0\frac{1+\frac{s}{\omega_z}}{1+\frac{s}{\omega_p}}\$ if we now neglect the high-frequency pole, we have: \$Z_{in}(s)\approx R_0(1+\frac{s}{\omega_z})\$. The impedance of an inductor affected by ohmic loss is defined as: \$Z_L(s)=r_L+sL=r_L(1+s\frac{L}{r_L})=r_L(1+\frac{s}{\omega_z})\$. From there, we can determine the equivalent inductance value brought by the GIC circuit: \$L_{eq}=\frac{R_0}{\omega_z}\$. The Mathcad sheet is shown below:

enter image description here

The equivalent inductance created by all resistors equal to 1 \$k\Omega\$ is 100 mH. The dc resistance is 20 mohms (-34 dB\$\Omega\$). The final plot is here:

enter image description here

A quick SPICE simulation confirms the analysis is correct:

enter image description here

The input impedance is swept by installing a 1-A ac stimulus across the input node. The collected voltage is therefore the image of the impedance you want.

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